Lines Matching defs:rctx
686 struct r600_context *rctx = (struct r600_context *)ctx;
780 struct r600_context *rctx = (struct r600_context *)ctx;
837 struct r600_context *rctx = (struct r600_context *)ctx;
911 if (rctx->chip_class == CAYMAN) {
1134 struct r600_context *rctx = (struct r600_context *)ctx;
1141 rctx->clip = *state;
1158 free(rctx->states[R600_PIPE_STATE_CLIP]);
1159 rctx->states[R600_PIPE_STATE_CLIP] = rstate;
1160 r600_context_pipe_state_set(rctx, rstate);
1175 static void evergreen_get_scissor_rect(struct r600_context *rctx,
1186 if (rctx->chip_class == CAYMAN) {
1198 struct r600_context *rctx = (struct r600_context *)ctx;
1205 evergreen_get_scissor_rect(rctx, state->minx, state->miny, state->maxx, state->maxy, &tl, &br);
1211 free(rctx->states[R600_PIPE_STATE_SCISSOR]);
1212 rctx->states[R600_PIPE_STATE_SCISSOR] = rstate;
1213 r600_context_pipe_state_set(rctx, rstate);
1219 struct r600_context *rctx = (struct r600_context *)ctx;
1225 rctx->viewport = *state;
1234 free(rctx->states[R600_PIPE_STATE_VIEWPORT]);
1235 rctx->states[R600_PIPE_STATE_VIEWPORT] = rstate;
1236 r600_context_pipe_state_set(rctx, rstate);
1239 void evergreen_init_color_surface(struct r600_context *rctx,
1242 struct r600_screen *rscreen = rctx->screen;
1256 r600_init_flushed_depth_texture(&rctx->context, pipe_tex, NULL);
1323 if (rctx->chip_class == CAYMAN && rtex->resource.b.b.nr_samples > 1) {
1405 base_offset = r600_resource_va(rctx->context.screen, pipe_tex);
1433 static void evergreen_init_depth_surface(struct r600_context *rctx,
1436 struct r600_screen *rscreen = rctx->screen;
1560 struct r600_context *rctx = (struct r600_context *)ctx;
1640 struct r600_context *rctx = (struct r600_context *)ctx;
1695 struct r600_context *rctx = (struct r600_context *)ctx;
1705 r600_flush_framebuffer(rctx, false);
1710 util_copy_framebuffer_state(&rctx->framebuffer, state);
1713 rctx->export_16bpc = true;
1714 rctx->nr_cbufs = state->nr_cbufs;
1715 rctx->cb0_is_integer = state->nr_cbufs &&
1717 rctx->compressed_cb_mask = 0;
1727 evergreen_init_color_surface(rctx, surf);
1731 rctx->export_16bpc = false;
1759 if (rctx->chip_class != CAYMAN && rtex->fmask_size && rtex->cmask_size) {
1760 rctx->compressed_cb_mask |= 1 << i;
1777 if (rctx->alphatest_state.bypass != surf->alphatest_bypass) {
1778 rctx->alphatest_state.bypass = surf->alphatest_bypass;
1779 r600_atom_dirty(rctx, &rctx->alphatest_state.atom);
1781 if (rctx->alphatest_state.cb0_export_16bpc != surf->export_16bpc) {
1782 rctx->alphatest_state.cb0_export_16bpc = surf->export_16bpc;
1783 r600_atom_dirty(rctx, &rctx->alphatest_state.atom);
1795 evergreen_init_depth_surface(rctx, surf);
1818 evergreen_get_scissor_rect(rctx, 0, 0, state->width, state->height, &tl, &br);
1838 if (rctx->chip_class == CAYMAN) {
1864 if (rctx->chip_class == CAYMAN) {
1877 free(rctx->states[R600_PIPE_STATE_FRAMEBUFFER]);
1878 rctx->states[R600_PIPE_STATE_FRAMEBUFFER] = rstate;
1879 r600_context_pipe_state_set(rctx, rstate);
1882 evergreen_polygon_offset_update(rctx);
1885 if (rctx->cb_misc_state.nr_cbufs != state->nr_cbufs) {
1886 rctx->cb_misc_state.nr_cbufs = state->nr_cbufs;
1887 r600_atom_dirty(rctx, &rctx->cb_misc_state.atom);
1890 if (state->nr_cbufs == 0 && rctx->alphatest_state.bypass) {
1891 rctx->alphatest_state.bypass = false;
1892 r600_atom_dirty(rctx, &rctx->alphatest_state.atom);
1895 if (rctx->chip_class == CAYMAN && rctx->db_misc_state.log_samples != log_samples) {
1896 rctx->db_misc_state.log_samples = log_samples;
1897 r600_atom_dirty(rctx, &rctx->db_misc_state.atom);
1901 static void evergreen_emit_cb_misc_state(struct r600_context *rctx, struct r600_atom *atom)
1903 struct radeon_winsys_cs *cs = rctx->cs;
1916 static void evergreen_emit_db_misc_state(struct r600_context *rctx, struct r600_atom *atom)
1918 struct radeon_winsys_cs *cs = rctx->cs;
1929 if (rctx->chip_class == CAYMAN) {
1950 static void evergreen_emit_vertex_buffers(struct r600_context *rctx,
1955 struct radeon_winsys_cs *cs = rctx->cs;
1968 va = r600_resource_va(&rctx->screen->screen, &rbuffer->b.b);
1991 r600_write_value(cs, r600_context_bo_reloc(rctx, rbuffer, RADEON_USAGE_READ));
1996 static void evergreen_fs_emit_vertex_buffers(struct r600_context *rctx, struct r600_atom * atom)
1998 evergreen_emit_vertex_buffers(rctx, &rctx->vertex_buffer_state, 992, 0);
2001 static void evergreen_cs_emit_vertex_buffers(struct r600_context *rctx, struct r600_atom * atom)
2003 evergreen_emit_vertex_buffers(rctx, &rctx->cs_vertex_buffer_state, 816,
2007 static void evergreen_emit_constant_buffers(struct r600_context *rctx,
2013 struct radeon_winsys_cs *cs = rctx->cs;
2026 va = r600_resource_va(&rctx->screen->screen, &rbuffer->b.b);
2034 r600_write_value(cs, r600_context_bo_reloc(rctx, rbuffer, RADEON_USAGE_READ));
2055 r600_write_value(cs, r600_context_bo_reloc(rctx, rbuffer, RADEON_USAGE_READ));
2062 static void evergreen_emit_vs_constant_buffers(struct r600_context *rctx, struct r600_atom *atom)
2064 evergreen_emit_constant_buffers(rctx, &rctx->vs_constbuf_state, 176,
2069 static void evergreen_emit_ps_constant_buffers(struct r600_context *rctx, struct r600_atom *atom)
2071 evergreen_emit_constant_buffers(rctx, &rctx->ps_constbuf_state, 0,
2076 static void evergreen_emit_sampler_views(struct r600_context *rctx,
2080 struct radeon_winsys_cs *cs = rctx->cs;
2096 reloc = r600_context_bo_reloc(rctx, rview->tex_resource,
2106 static void evergreen_emit_vs_sampler_views(struct r600_context *rctx, struct r600_atom *atom)
2108 evergreen_emit_sampler_views(rctx, &rctx->vs_samplers.views, 176 + R600_MAX_CONST_BUFFERS);
2111 static void evergreen_emit_ps_sampler_views(struct r600_context *rctx, struct r600_atom *atom)
2113 evergreen_emit_sampler_views(rctx, &rctx->ps_samplers.views, R600_MAX_CONST_BUFFERS);
2116 static void evergreen_emit_sampler(struct r600_context *rctx,
2121 struct radeon_winsys_cs *cs = rctx->cs;
2141 static void evergreen_emit_vs_sampler(struct r600_context *rctx, struct r600_atom *atom)
2143 evergreen_emit_sampler(rctx, &rctx->vs_samplers, 18, R_00A414_TD_VS_SAMPLER0_BORDER_INDEX);
2146 static void evergreen_emit_ps_sampler(struct r600_context *rctx, struct r600_atom *atom)
2148 evergreen_emit_sampler(rctx, &rctx->ps_samplers, 0, R_00A400_TD_PS_SAMPLER0_BORDER_INDEX);
2151 static void evergreen_emit_sample_mask(struct r600_context *rctx, struct r600_atom *a)
2156 r600_write_context_reg(rctx->cs, R_028C3C_PA_SC_AA_MASK,
2160 static void cayman_emit_sample_mask(struct r600_context *rctx, struct r600_atom *a)
2163 struct radeon_winsys_cs *cs = rctx->cs;
2171 void evergreen_init_state_functions(struct r600_context *rctx)
2173 r600_init_atom(&rctx->cb_misc_state.atom, evergreen_emit_cb_misc_state, 0, 0);
2174 r600_atom_dirty(rctx, &rctx->cb_misc_state.atom);
2175 r600_init_atom(&rctx->db_misc_state.atom, evergreen_emit_db_misc_state, 7, 0);
2176 r600_atom_dirty(rctx, &rctx->db_misc_state.atom);
2177 r600_init_atom(&rctx->vertex_buffer_state.atom, evergreen_fs_emit_vertex_buffers, 0, 0);
2178 r600_init_atom(&rctx->cs_vertex_buffer_state.atom, evergreen_cs_emit_vertex_buffers, 0, 0);
2179 r600_init_atom(&rctx->vs_constbuf_state.atom, evergreen_emit_vs_constant_buffers, 0, 0);
2180 r600_init_atom(&rctx->ps_constbuf_state.atom, evergreen_emit_ps_constant_buffers, 0, 0);
2181 r600_init_atom(&rctx->vs_samplers.views.atom, evergreen_emit_vs_sampler_views, 0, 0);
2182 r600_init_atom(&rctx->ps_samplers.views.atom, evergreen_emit_ps_sampler_views, 0, 0);
2183 r600_init_atom(&rctx->cs_shader_state.atom, evergreen_emit_cs_shader, 0, 0);
2184 r600_init_atom(&rctx->vs_samplers.atom_sampler, evergreen_emit_vs_sampler, 0, 0);
2185 r600_init_atom(&rctx->ps_samplers.atom_sampler, evergreen_emit_ps_sampler, 0, 0);
2187 if (rctx->chip_class == EVERGREEN)
2188 r600_init_atom(&rctx->sample_mask.atom, evergreen_emit_sample_mask, 3, 0);
2190 r600_init_atom(&rctx->sample_mask.atom, cayman_emit_sample_mask, 4, 0);
2191 rctx->sample_mask.sample_mask = ~0;
2192 r600_atom_dirty(rctx, &rctx->sample_mask.atom);
2194 rctx->context.create_blend_state = evergreen_create_blend_state;
2195 rctx->context.create_depth_stencil_alpha_state = evergreen_create_dsa_state;
2196 rctx->context.create_fs_state = r600_create_shader_state_ps;
2197 rctx->context.create_rasterizer_state = evergreen_create_rs_state;
2198 rctx->context.create_sampler_state = evergreen_create_sampler_state;
2199 rctx->context.create_sampler_view = evergreen_create_sampler_view;
2200 rctx->context.create_vertex_elements_state = r600_create_vertex_elements;
2201 rctx->context.create_vs_state = r600_create_shader_state_vs;
2202 rctx->context.bind_blend_state = r600_bind_blend_state;
2203 rctx->context.bind_depth_stencil_alpha_state = r600_bind_dsa_state;
2204 rctx->context.bind_fragment_sampler_states = r600_bind_ps_samplers;
2205 rctx->context.bind_fs_state = r600_bind_ps_shader;
2206 rctx->context.bind_rasterizer_state = r600_bind_rs_state;
2207 rctx->context.bind_vertex_elements_state = r600_bind_vertex_elements;
2208 rctx->context.bind_vertex_sampler_states = r600_bind_vs_samplers;
2209 rctx->context.bind_vs_state = r600_bind_vs_shader;
2210 rctx->context.delete_blend_state = r600_delete_state;
2211 rctx->context.delete_depth_stencil_alpha_state = r600_delete_state;
2212 rctx->context.delete_fs_state = r600_delete_ps_shader;
2213 rctx->context.delete_rasterizer_state = r600_delete_rs_state;
2214 rctx->context.delete_sampler_state = r600_delete_sampler;
2215 rctx->context.delete_vertex_elements_state = r600_delete_vertex_element;
2216 rctx->context.delete_vs_state = r600_delete_vs_shader;
2217 rctx->context.set_blend_color = r600_set_blend_color;
2218 rctx->context.set_clip_state = evergreen_set_clip_state;
2219 rctx->context.set_constant_buffer = r600_set_constant_buffer;
2220 rctx->context.set_fragment_sampler_views = evergreen_set_ps_sampler_views;
2221 rctx->context.set_framebuffer_state = evergreen_set_framebuffer_state;
2222 rctx->context.set_polygon_stipple = evergreen_set_polygon_stipple;
2223 rctx->context.set_sample_mask = r600_set_sample_mask;
2224 rctx->context.set_scissor_state = evergreen_set_scissor_state;
2225 rctx->context.set_stencil_ref = r600_set_pipe_stencil_ref;
2226 rctx->context.set_vertex_buffers = r600_set_vertex_buffers;
2227 rctx->context.set_index_buffer = r600_set_index_buffer;
2228 rctx->context.set_vertex_sampler_views = evergreen_set_vs_sampler_views;
2229 rctx->context.set_viewport_state = evergreen_set_viewport_state;
2230 rctx->context.sampler_view_destroy = r600_sampler_view_destroy;
2231 rctx->context.texture_barrier = r600_texture_barrier;
2232 rctx->context.create_stream_output_target = r600_create_so_target;
2233 rctx->context.stream_output_target_destroy = r600_so_target_destroy;
2234 rctx->context.set_stream_output_targets = r600_set_so_targets;
2235 evergreen_init_compute_state_functions(rctx);
2238 static void cayman_init_atom_start_cs(struct r600_context *rctx)
2240 struct r600_command_buffer *cb = &rctx->start_cs_cmd;
2377 if (rctx->screen->has_streamout) {
2596 void evergreen_init_atom_start_cs(struct r600_context *rctx)
2598 struct r600_command_buffer *cb = &rctx->start_cs_cmd;
2615 if (rctx->chip_class == CAYMAN) {
2616 cayman_init_atom_start_cs(rctx);
2627 evergreen_init_common_regs(cb, rctx->chip_class
2628 , rctx->family, rctx->screen->info.drm_minor);
2630 family = rctx->family;
2909 if (rctx->screen->has_streamout) {
2917 void evergreen_polygon_offset_update(struct r600_context *rctx)
2923 if (rctx->rasterizer && rctx->framebuffer.zsbuf) {
2924 float offset_units = rctx->rasterizer->offset_units;
2927 switch (rctx->framebuffer.zsbuf->format) {
2950 fui(rctx->rasterizer->offset_scale));
2956 fui(rctx->rasterizer->offset_scale));
2963 r600_context_pipe_state_set(rctx, &state);
2969 struct r600_context *rctx = (struct r600_context *)ctx;
3008 rctx->rasterizer && rctx->rasterizer->flatshade)) {
3013 (rctx->sprite_coord_enable & (1 << rshader->input[i].sid))) {
3111 shader->sprite_coord_enable = rctx->sprite_coord_enable;
3112 if (rctx->rasterizer)
3113 shader->flatshade = rctx->rasterizer->flatshade;
3118 struct r600_context *rctx = (struct r600_context *)ctx;
3170 struct r600_context *rctx = (struct r600_context *)ctx;
3179 void *evergreen_create_resolve_blend(struct r600_context *rctx)
3187 rstate = evergreen_create_blend_state_mode(&rctx->context, &blend, V_028808_CB_RESOLVE);
3191 void *evergreen_create_decompress_blend(struct r600_context *rctx)
3199 rstate = evergreen_create_blend_state_mode(&rctx->context, &blend, V_028808_CB_DECOMPRESS);
3203 void *evergreen_create_db_flush_dsa(struct r600_context *rctx)
3207 return rctx->context.create_depth_stencil_alpha_state(&rctx->context, &dsa);
3210 void evergreen_update_dual_export_state(struct r600_context * rctx)
3212 unsigned dual_export = rctx->export_16bpc && rctx->nr_cbufs &&
3213 !rctx->ps_shader->current->ps_depth_export;
3218 unsigned db_shader_control = rctx->ps_shader->current->db_shader_control |
3221 S_02880C_ALPHA_TO_MASK_DISABLE(rctx->cb0_is_integer);
3223 if (db_shader_control != rctx->db_shader_control) {
3226 rctx->db_shader_control = db_shader_control;
3230 r600_context_pipe_state_set(rctx, &rstate);
