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16 class InstR600 <bits<32> inst, dag outs, dag ins, string asm, list<dag> pattern,
18 : AMDGPUInst <outs, ins, asm, pattern> {
28 let OutOperandList = outs;
43 class InstR600ISA <dag outs, dag ins, string asm, list<dag> pattern> :
44 AMDGPUInst <outs, ins, asm, pattern>
81 (outs R600_Reg32:$dst),
91 (outs R600_Reg32:$dst),
101 (outs R600_Reg32:$dst),
112 def PRED_X : InstR600 <0, (outs R600_Predicate_Bit:$dst),
127 (outs),
137 (outs R600_Reg32:$dst),
148 (outs R600_Reg128:$dst),
162 class EG_CF_RAT <bits <8> cf_inst, bits <6> rat_inst, bits<4> rat_id, dag outs,
164 InstR600ISA <outs, ins, asm, pattern>
324 def MOV : InstR600 <0x19, (outs R600_Reg32:$dst),
332 (outs R600_Reg32:$dst),
351 (outs R600_Reg32:$dst),
576 (outs R600_Reg128:$dst),
585 (outs R600_Reg32:$dst),
882 def RAT_WRITE_CACHELESS_eg : EG_CF_RAT <0x57, 0x2, 0, (outs),
915 class VTX_READ_eg <bits<8> buffer_id, dag outs, list<dag> pattern>
916 : InstR600ISA <outs, (ins MEMxi:$ptr), "VTX_READ_eg $dst, $ptr", pattern> {
998 : VTX_READ_eg <buffer_id, (outs R600_TReg32_X:$dst), pattern> {
1018 : VTX_READ_eg <buffer_id, (outs R600_Reg128:$dst), pattern> {
1094 (outs R600_Reg128:$dst),
1103 (outs R600_TReg32:$dst),
1110 (outs R600_Reg32:$dst),
1117 (outs),
1124 (outs R600_Reg128:$dst),
1131 (outs R600_Reg128:$dst),
1148 (outs),
1160 def RETURN : ILFormat<(outs), (ins variable_ops),