Lines Matching full:case
448 case 0: /* LSL */
455 case 1: /* LSR */
468 case 2: /* ASR */
477 case 3: /* ROR/RRX */
499 case 0: gen_helper_shl_cc(var, var, shift); break;
500 case 1: gen_helper_shr_cc(var, var, shift); break;
501 case 2: gen_helper_sar_cc(var, var, shift); break;
502 case 3: gen_helper_ror_cc(var, var, shift); break;
506 case 0: gen_helper_shl(var, var, shift); break;
507 case 1: gen_helper_shr(var, var, shift); break;
508 case 2: gen_helper_sar(var, var, shift); break;
509 case 3: tcg_gen_andi_i32(shift, shift, 0x1f);
518 case 0: gen_pas_helper(glue(pfx,add16)); break; \
519 case 1: gen_pas_helper(glue(pfx,addsubx)); break; \
520 case 2: gen_pas_helper(glue(pfx,subaddx)); break; \
521 case 3: gen_pas_helper(glue(pfx,sub16)); break; \
522 case 4: gen_pas_helper(glue(pfx,add8)); break; \
523 case 7: gen_pas_helper(glue(pfx,sub8)); break; \
531 case 1:
537 case 5:
545 case 2:
548 case 3:
551 case 6:
554 case 7:
565 case 0: gen_pas_helper(glue(pfx,add8)); break; \
566 case 1: gen_pas_helper(glue(pfx,add16)); break; \
567 case 2: gen_pas_helper(glue(pfx,addsubx)); break; \
568 case 4: gen_pas_helper(glue(pfx,sub8)); break; \
569 case 5: gen_pas_helper(glue(pfx,sub16)); break; \
570 case 6: gen_pas_helper(glue(pfx,subaddx)); break; \
578 case 0:
584 case 4:
592 case 1:
595 case 2:
598 case 5:
601 case 6:
616 case 0: /* eq: Z */
620 case 1: /* ne: !Z */
624 case 2: /* cs: C */
628 case 3: /* cc: !C */
632 case 4: /* mi: N */
636 case 5: /* pl: !N */
640 case 6: /* vs: V */
644 case 7: /* vc: !V */
648 case 8: /* hi: C && !Z */
657 case 9: /* ls: !C || Z */
664 case 10: /* ge: N == V -> N ^ V == 0 */
671 case 11: /* lt: N != V -> N ^ V != 0 */
678 case 12: /* gt: !Z && N == V */
690 case 13: /* le: Z || N != V */
1470 case 0x000: /* WOR */
1481 case 0x011: /* TMCR */
1487 case ARM_IWMMXT_wCID:
1488 case ARM_IWMMXT_wCASF:
1490 case ARM_IWMMXT_wCon:
1493 case ARM_IWMMXT_wCSSF:
1500 case ARM_IWMMXT_wCGR0:
1501 case ARM_IWMMXT_wCGR1:
1502 case ARM_IWMMXT_wCGR2:
1503 case ARM_IWMMXT_wCGR3:
1512 case 0x100: /* WXOR */
1523 case 0x111: /* TMRC */
1531 case 0x300: /* WANDN */
1543 case 0x200: /* WAND */
1554 case 0x810: case 0xa10: /* WMADD */
1566 case 0x10e: case 0x50e: case 0x90e: case 0xd0e: /* WUNPCKIL */
1572 case 0:
1575 case 1:
1578 case 2:
1581 case 3:
1588 case 0x10c: case 0x50c: case 0x90c: case 0xd0c: /* WUNPCKIH */
1594 case 0:
1597 case 1:
1600 case 2:
1603 case 3:
1610 case 0x012: case 0x112: case 0x412: case 0x512: /* WSAD */
1624 case 0x010: case 0x110: case 0x210: case 0x310: /* WMUL */
1643 case 0x410: case 0x510: case 0x610: case 0x710: /* WMAC */
1659 case 0x006: case 0x406: case 0x806: case 0xc06: /* WCMPEQ */
1665 case 0:
1668 case 1:
1671 case 2:
1674 case 3:
1681 case 0x800: case 0x900: case 0xc00: case 0xd00: /* WAVG2 */
1701 case 0x802: case 0x902: case 0xa02: case 0xb02: /* WALIGNR */
1714 case 0x601: case 0x605: case 0x609: case 0x60d: /* TINSR */
1722 case 0:
1726 case 1:
1730 case 2:
1745 case 0x107: case 0x507: case 0x907: case 0xd07: /* TEXTRM */
1753 case 0:
1762 case 1:
1771 case 2:
1778 case 0x117: case 0x517: case 0x917: case 0xd17: /* TEXTRC */
1783 case 0:
1786 case 1:
1789 case 2:
1797 case 0x401: case 0x405: case 0x409: case 0x40d: /* TBCST */
1804 case 0:
1807 case 1:
1810 case 2:
1818 case 0x113: case 0x513: case 0x913: case 0xd13: /* TANDC */
1825 case 0:
1831 case 1:
1837 case 2:
1846 case 0x01c: case 0x41c: case 0x81c: case 0xc1c: /* WACC */
1851 case 0:
1854 case 1:
1857 case 2:
1860 case 3:
1866 case 0x115: case 0x515: case 0x915: case 0xd15: /* TORC */
1873 case 0:
1879 case 1:
1885 case 2:
1894 case 0x103: case 0x503: case 0x903: case 0xd03: /* TMOVMSK */
1902 case 0:
1905 case 1:
1908 case 2:
1914 case 0x106: case 0x306: case 0x506: case 0x706: /* WCMPGT */
1915 case 0x906: case 0xb06: case 0xd06: case 0xf06:
1921 case 0:
1927 case 1:
1933 case 2:
1939 case 3:
1946 case 0x00e: case 0x20e: case 0x40e: case 0x60e: /* WUNPCKEL */
1947 case 0x80e: case 0xa0e: case 0xc0e: case 0xe0e:
1952 case 0:
1958 case 1:
1964 case 2:
1970 case 3:
1977 case 0x00c: case 0x20c: case 0x40c: case 0x60c: /* WUNPCKEH */
1978 case 0x80c: case 0xa0c: case 0xc0c: case 0xe0c:
1983 case 0:
1989 case 1:
1995 case 2:
2001 case 3:
2008 case 0x204: case 0x604: case 0xa04: case 0xe04: /* WSRL */
2009 case 0x214: case 0x614: case 0xa14: case 0xe14:
2021 case 1:
2024 case 2:
2027 case 3:
2036 case 0x004: case 0x404: case 0x804: case 0xc04: /* WSRA */
2037 case 0x014: case 0x414: case 0x814: case 0xc14:
2049 case 1:
2052 case 2:
2055 case 3:
2064 case 0x104: case 0x504: case 0x904: case 0xd04: /* WSLL */
2065 case 0x114: case 0x514: case 0x914: case 0xd14:
2077 case 1:
2080 case 2:
2083 case 3:
2092 case 0x304: case 0x704: case 0xb04: case 0xf04: /* WROR */
2093 case 0x314: case 0x714: case 0xb14: case 0xf14:
2101 case 1:
2108 case 2:
2115 case 3:
2128 case 0x116: case 0x316: case 0x516: case 0x716: /* WMIN */
2129 case 0x916: case 0xb16: case 0xd16: case 0xf16:
2135 case 0:
2141 case 1:
2147 case 2:
2153 case 3:
2159 case 0x016: case 0x216: case 0x416: case 0x616: /* WMAX */
2160 case 0x816: case 0xa16: case 0xc16: case 0xe16:
2166 case 0:
2172 case 1:
2178 case 2:
2184 case 3:
2190 case 0x002: case 0x102: case 0x202: case 0x302: /* WALIGNI */
2191 case 0x402: case 0x502: case 0x602: case 0x702:
2203 case 0x01a: case 0x11a: case 0x21a: case 0x31a: /* WSUB */
2204 case 0x41a: case 0x51a: case 0x61a: case 0x71a:
2205 case 0x81a: case 0x91a: case 0xa1a: case 0xb1a:
2206 case 0xc1a: case 0xd1a: case 0xe1a: case 0xf1a:
2212 case 0x0:
2215 case 0x1:
2218 case 0x3:
2221 case 0x4:
2224 case 0x5:
2227 case 0x7:
2230 case 0x8:
2233 case 0x9:
2236 case 0xb:
2246 case 0x01e: case 0x11e: case 0x21e: case 0x31e: /* WSHUFH */
2247 case 0x41e: case 0x51e: case 0x61e: case 0x71e:
2248 case 0x81e: case 0x91e: case 0xa1e: case 0xb1e:
2249 case 0xc1e: case 0xd1e: case 0xe1e: case 0xf1e:
2260 case 0x018: case 0x118: case 0x218: case 0x318: /* WADD */
2261 case 0x418: case 0x518: case 0x618: case 0x718:
2262 case 0x818: case 0x918: case 0xa18: case 0xb18:
2263 case 0xc18: case 0xd18: case 0xe18: case 0xf18:
2269 case 0x0:
2272 case 0x1:
2275 case 0x3:
2278 case 0x4:
2281 case 0x5:
2284 case 0x7:
2287 case 0x8:
2290 case 0x9:
2293 case 0xb:
2303 case 0x008: case 0x108: case 0x208: case 0x308: /* WPACK */
2304 case 0x408: case 0x508: case 0x608: case 0x708:
2305 case 0x808: case 0x908: case 0xa08: case 0xb08:
2306 case 0xc08: case 0xd08: case 0xe08: case 0xf08:
2314 case 1:
2320 case 2:
2326 case 3:
2337 case 0x201: case 0x203: case 0x205: case 0x207:
2338 case 0x209: case 0x20b: case 0x20d: case 0x20f:
2339 case 0x211: case 0x213: case 0x215: case 0x217:
2340 case 0x219: case 0x21b: case 0x21d: case 0x21f:
2350 case 0x0: /* TMIA */
2353 case 0x8: /* TMIAPH */
2356 case 0xc: case 0xd: case 0xe: case 0xf: /* TMIAxy */
2399 case 0x0: /* MIA */
2402 case 0x8: /* MIAPH */
2405 case 0xc: /* MIABB */
2406 case 0xd: /* MIABT */
2407 case 0xe: /* MIATB */
2408 case 0xf: /* MIATT */
2515 case 2:
2518 case 3:
2521 case 4:
2532 case 2:
2535 case 3:
2538 case 4:
2706 case 0:
2710 case 1:
2714 case 2:
2747 case 0xe:
2777 case 0:
2785 case 1:
2800 case 2:
2823 case 0:
2828 case 1:
2833 case 2:
2850 case ARM_VFP_FPSID:
2859 case ARM_VFP_FPEXC:
2864 case ARM_VFP_FPINST:
2865 case ARM_VFP_FPINST2:
2872 case ARM_VFP_FPSCR:
2881 case ARM_VFP_MVFR0:
2882 case ARM_VFP_MVFR1:
2909 case ARM_VFP_FPSID:
2910 case ARM_VFP_MVFR0:
2911 case ARM_VFP_MVFR1:
2914 case ARM_VFP_FPSCR:
2919 case ARM_VFP_FPEXC:
2928 case ARM_VFP_FPINST:
2929 case ARM_VFP_FPINST2:
3021 case 16:
3022 case 17:
3026 case 8:
3027 case 9:
3032 case 10:
3033 case 11:
3038 case 20:
3039 case 21:
3040 case 22:
3041 case 23:
3042 case 28:
3043 case 29:
3044 case 30:
3045 case 31:
3063 case 0: /* VMLA: fd + (fn * fm) */
3069 case 1: /* VMLS: fd + -(fn * fm) */
3075 case 2: /* VNMLS: -fd + (fn * fm) */
3085 case 3: /* VNMLA: -fd + -(fn * fm) */
3092 case 4: /* mul: fn * fm */
3095 case 5: /* nmul: -(fn * fm) */
3099 case 6: /* add: fn + fm */
3102 case 7: /* sub: fn - fm */
3105 case 8: /* div: fn / fm */
3108 case 14: /* fconst */
3130 case 15: /* extension space */
3132 case 0: /* cpy */
3135 case 1: /* abs */
3138 case 2: /* neg */
3141 case 3: /* sqrt */
3144 case 4: /* vcvtb.f32.f16 */
3152 case 5: /* vcvtt.f32.f16 */
3160 case 6: /* vcvtb.f16.f32 */
3172 case 7: /* vcvtt.f16.f32 */
3185 case 8: /* cmp */
3188 case 9: /* cmpe */
3191 case 10: /* cmpz */
3194 case 11: /* cmpez */
3198 case 15: /* single<->double conversion */
3204 case 16: /* fuito */
3207 case 17: /* fsito */
3210 case 20: /* fshto */
3215 case 21: /* fslto */
3220 case 22: /* fuhto */
3225 case 23: /* fulto */
3230 case 24: /* ftoui */
3233 case 25: /* ftouiz */
3236 case 26: /* ftosi */
3239 case 27: /* ftosiz */
3242 case 28: /* ftosh */
3247 case 29: /* ftosl */
3252 case 30: /* ftouh */
3257 case 31: /* ftoul */
3321 case 0xc:
3322 case 0xd:
3595 case 3: /* wfi */
3599 case 2: /* wfe */
3600 case 4: /* sev */
3612 case 0: gen_helper_neon_add_u8(t0, t0, t1); break;
3613 case 1: gen_helper_neon_add_u16(t0, t0, t1); break;
3614 case 2: tcg_gen_add_i32(t0, t0, t1); break;
3622 case 0: gen_helper_neon_sub_u8(t0, t1, t0); break;
3623 case 1: gen_helper_neon_sub_u16(t0, t1, t0); break;
3624 case 2: tcg_gen_sub_i32(t0, t1, t0); break;
3637 case 0: \
3640 case 1: \
3643 case 2: \
3646 case 3: \
3649 case 4: \
3652 case 5: \
3697 case 0:
3700 case 1:
3703 case 2:
3711 case 0:
3714 case 1:
3736 case 0:
3739 case 1:
3742 case 2:
3750 case 0:
3753 case 1:
3858 case 4:
3863 case 8:
3936 case 0:
3940 case 1:
3944 case 2:
3954 case 1:
3960 case 3:
3965 case 2:
3970 case 4:
3990 case 0:
3993 case 1:
3996 case 2:
4013 case 0:
4016 case 1:
4019 case 2:
4059 case 0: gen_helper_neon_narrow_u8(dest, src); break;
4060 case 1: gen_helper_neon_narrow_u16(dest, src); break;
4061 case 2: tcg_gen_trunc_i64_i32(dest, src); break;
4069 case 0: gen_helper_neon_narrow_sat_s8(dest, src); break;
4070 case 1: gen_helper_neon_narrow_sat_s16(dest, src); break;
4071 case 2: gen_helper_neon_narrow_sat_s32(dest, src); break;
4079 case 0: gen_helper_neon_narrow_sat_u8(dest, src); break;
4080 case 1: gen_helper_neon_narrow_sat_u16(dest, src); break;
4081 case 2: gen_helper_neon_narrow_sat_u32(dest, src); break;
4089 case 0: gen_helper_neon_unarrow_sat8(dest, src); break;
4090 case 1: gen_helper_neon_unarrow_sat16(dest, src); break;
4091 case 2: gen_helper_neon_unarrow_sat32(dest, src); break;
4102 case 1: gen_helper_neon_rshl_u16(var, var, shift); break;
4103 case 2: gen_helper_neon_rshl_u32(var, var, shift); break;
4108 case 1: gen_helper_neon_rshl_s16(var, var, shift); break;
4109 case 2: gen_helper_neon_rshl_s32(var, var, shift); break;
4116 case 1: gen_helper_neon_shl_u16(var, var, shift); break;
4117 case 2: gen_helper_neon_shl_u32(var, var, shift); break;
4122 case 1: gen_helper_neon_shl_s16(var, var, shift); break;
4123 case 2: gen_helper_neon_shl_s32(var, var, shift); break;
4134 case 0: gen_helper_neon_widen_u8(dest, src); break;
4135 case 1: gen_helper_neon_widen_u16(dest, src); break;
4136 case 2: tcg_gen_extu_i32_i64(dest, src); break;
4141 case 0: gen_helper_neon_widen_s8(dest, src); break;
4142 case 1: gen_helper_neon_widen_s16(dest, src); break;
4143 case 2: tcg_gen_ext_i32_i64(dest, src); break;
4153 case 0: gen_helper_neon_addl_u16(CPU_V001); break;
4154 case 1: gen_helper_neon_addl_u32(CPU_V001); break;
4155 case 2: tcg_gen_add_i64(CPU_V001); break;
4163 case 0: gen_helper_neon_subl_u16(CPU_V001); break;
4164 case 1: gen_helper_neon_subl_u32(CPU_V001); break;
4165 case 2: tcg_gen_sub_i64(CPU_V001); break;
4173 case 0: gen_helper_neon_negl_u16(var, var); break;
4174 case 1: gen_helper_neon_negl_u32(var, var); break;
4175 case 2: gen_helper_neon_negl_u64(var, var); break;
4183 case 1: gen_helper_neon_addl_saturate_s32(op0, op0, op1); break;
4184 case 2: gen_helper_neon_addl_saturate_s64(op0, op0, op1); break;
4194 case 0: gen_helper_neon_mull_s8(dest, a, b); break;
4195 case 1: gen_helper_neon_mull_u8(dest, a, b); break;
4196 case 2: gen_helper_neon_mull_s16(dest, a, b); break;
4197 case 3: gen_helper_neon_mull_u16(dest, a, b); break;
4198 case 4:
4203 case 5:
4458 case NEON_3R_VQADD:
4465 case NEON_3R_VQSUB:
4472 case NEON_3R_VSHL:
4479 case NEON_3R_VQSHL:
4486 case NEON_3R_VRSHL:
4493 case NEON_3R_VQRSHL:
4500 case NEON_3R_VADD_VSUB:
4516 case NEON_3R_VSHL:
4517 case NEON_3R_VQSHL:
4518 case NEON_3R_VRSHL:
4519 case NEON_3R_VQRSHL:
4528 case NEON_3R_VPADD:
4533 case NEON_3R_VPMAX:
4534 case NEON_3R_VPMIN:
4537 case NEON_3R_FLOAT_ARITH:
4540 case NEON_3R_FLOAT_MINMAX:
4543 case NEON_3R_FLOAT_CMP:
4549 case NEON_3R_FLOAT_ACMP:
4554 case NEON_3R_VRECPS_VRSQRTS:
4559 case NEON_3R_VMUL:
4591 case NEON_3R_VHADD:
4594 case NEON_3R_VQADD:
4597 case NEON_3R_VRHADD:
4600 case NEON_3R_LOGIC: /* Logic ops. */
4602 case 0: /* VAND */
4605 case 1: /* BIC */
4608 case 2: /* VORR */
4611 case 3: /* VORN */
4614 case 4: /* VEOR */
4617 case 5: /* VBSL */
4622 case 6: /* VBIT */
4627 case 7: /* VBIF */
4634 case NEON_3R_VHSUB:
4637 case NEON_3R_VQSUB:
4640 case NEON_3R_VCGT:
4643 case NEON_3R_VCGE:
4646 case NEON_3R_VSHL:
4649 case NEON_3R_VQSHL:
4652 case NEON_3R_VRSHL:
4655 case NEON_3R_VQRSHL:
4658 case NEON_3R_VMAX:
4661 case NEON_3R_VMIN:
4664 case NEON_3R_VABD:
4667 case NEON_3R_VABA:
4673 case NEON_3R_VADD_VSUB:
4678 case 0: gen_helper_neon_sub_u8(tmp, tmp, tmp2); break;
4679 case 1: gen_helper_neon_sub_u16(tmp, tmp, tmp2); break;
4680 case 2: tcg_gen_sub_i32(tmp, tmp, tmp2); break;
4685 case NEON_3R_VTST_VCEQ:
4688 case 0: gen_helper_neon_tst_u8(tmp, tmp, tmp2); break;
4689 case 1: gen_helper_neon_tst_u16(tmp, tmp, tmp2); break;
4690 case 2: gen_helper_neon_tst_u32(tmp, tmp, tmp2); break;
4695 case 0: gen_helper_neon_ceq_u8(tmp, tmp, tmp2); break;
4696 case 1: gen_helper_neon_ceq_u16(tmp, tmp, tmp2); break;
4697 case 2: gen_helper_neon_ceq_u32(tmp, tmp, tmp2); break;
4702 case NEON_3R_VML: /* VMLA, VMLAL, VMLS,VMLSL */
4704 case 0: gen_helper_neon_mul_u8(tmp, tmp, tmp2); break;
4705 case 1: gen_helper_neon_mul_u16(tmp, tmp, tmp2); break;
4706 case 2: tcg_gen_mul_i32(tmp, tmp, tmp2); break;
4717 case NEON_3R_VMUL:
4722 case 0: gen_helper_neon_mul_u8(tmp, tmp, tmp2); break;
4723 case 1: gen_helper_neon_mul_u16(tmp, tmp, tmp2); break;
4724 case 2: tcg_gen_mul_i32(tmp, tmp, tmp2); break;
4729 case NEON_3R_VPMAX:
4732 case NEON_3R_VPMIN:
4735 case NEON_3R_VQDMULH_VQRDMULH: /* Multiply high. */
4738 case 1: gen_helper_neon_qdmulh_s16(tmp, tmp, tmp2); break;
4739 case 2: gen_helper_neon_qdmulh_s32(tmp, tmp, tmp2); break;
4744 case 1: gen_helper_neon_qrdmulh_s16(tmp, tmp, tmp2); break;
4745 case 2: gen_helper_neon_qrdmulh_s32(tmp, tmp, tmp2); break;
4750 case NEON_3R_VPADD:
4752 case
4753 case 1: gen_helper_neon_padd_u16(tmp, tmp, tmp2); break;
4754 case 2: tcg_gen_add_i32(tmp, tmp, tmp2); break;
4758 case NEON_3R_FLOAT_ARITH: /* Floating point arithmetic. */
4760 case 0: /* VADD */
4763 case 2: /* VSUB */
4766 case 4: /* VPADD */
4769 case 6: /* VABD */
4776 case NEON_3R_FLOAT_MULTIPLY:
4788 case NEON_3R_FLOAT_CMP:
4798 case NEON_3R_FLOAT_ACMP:
4804 case NEON_3R_FLOAT_MINMAX:
4810 case NEON_3R_VRECPS_VRSQRTS:
4875 case 0:
4880 case 1:
4884 case 2:
4885 case 3:
4897 case 0: /* VSHR */
4898 case 1: /* VSRA */
4904 case 2: /* VRSHR */
4905 case 3: /* VRSRA */
4911 case 4: /* VSRI */
4912 case 5: /* VSHL, VSLI */
4915 case 6: /* VQSHLU */
4918 case 7: /* VQSHL */
4954 case 0: /* VSHR */
4955 case 1: /* VSRA */
4958 case 2: /* VRSHR */
4959 case 3: /* VRSRA */
4962 case 4: /* VSRI */
4963 case 5: /* VSHL, VSLI */
4965 case 0: gen_helper_neon_shl_u8(tmp, tmp, tmp2); break;
4966 case 1: gen_helper_neon_shl_u16(tmp, tmp, tmp2); break;
4967 case 2: gen_helper_neon_shl_u32(tmp, tmp, tmp2); break;
4971 case 6: /* VQSHLU */
4973 case 0:
4976 case 1:
4979 case 2:
4986 case 7: /* VQSHL */
5000 case 0:
5008 case 1:
5015 case 2:
5191 * We choose to not special-case this and will behave as if a
5195 case 0: case 1:
5198 case 2: case 3:
5201 case 4: case 5:
5204 case 6: case 7:
5207 case 8: case 9:
5210 case 10: case 11:
5213 case 12:
5216 case 13:
5219 case 14:
5224 case 15:
5353 case 0: case 1: case 4: /* VADDL, VADDW, VADDHN, VRADDHN */
5356 case 2: case 3: case 6: /* VSUBL, VSUBW, VSUBHN, VRSUBHN */
5359 case 5: case 7: /* VABAL, VABDL */
5361 case 0:
5364 case 1:
5367 case 2:
5370 case 3:
5373 case 4:
5376 case 5:
5384 case 8: case 9: case 10: case 11: case 12: case 13:
5388 case 14: /* Polynomial VMULL */
5404 case 10: /* VMLSL */
5407 case 5: case 8: /* VABAL, VMLAL */
5410 case 9: case 11: /* VQDMLAL, VQDMLSL */
5426 case 0:
5429 case 1:
5432 case 2:
5440 case 0:
5443 case 1:
5446 case 2:
5474 case 1: /* Float VMLA scalar */
5475 case 5: /* Floating point VMLS scalar */
5476 case 9: /* Floating point VMUL scalar */
5481 case 0: /* Integer VMLA scalar */
5482 case 4: /* Integer VMLS scalar */
5483 case 8: /* Integer VMUL scalar */
5484 case 12: /* VQDMULH scalar */
5485 case 13: /* VQRDMULH scalar */
5510 case 0: gen_helper_neon_mul_u8(tmp, tmp, tmp2); break;
5511 case 1: gen_helper_neon_mul_u16(tmp, tmp, tmp2); break;
5512 case 2: tcg_gen_mul_i32(tmp, tmp, tmp2); break;
5521 case 0:
5524 case 1:
5527 case 4:
5530 case 5:
5541 case 3: /* VQDMLAL scalar */
5542 case 7: /* VQDMLSL scalar */
5543 case 11: /* VQDMULL scalar */
5548 case 2: /* VMLAL sclar */
5549 case 6: /* VMLSL scalar */
5550 case 10: /* VMULL scalar */
5573 case 6:
5576 case 2:
5579 case 3: case 7:
5586 case 10:
5589 case 11:
5673 case NEON_2RM_VREV64:
5678 case 0: tcg_gen_bswap32_i32(tmp, tmp); break;
5679 case 1: gen_swap_half(tmp); break;
5680 case 2: /* no-op */ break;
5688 case 0: tcg_gen_bswap32_i32(tmp2, tmp2); break;
5689 case 1: gen_swap_half(tmp2); break;
5696 case NEON_2RM_VPADDL: case NEON_2RM_VPADDL_U:
5697 case NEON_2RM_VPADAL: case NEON_2RM_VPADAL_U:
5704 case 0: gen_helper_neon_paddl_u16(CPU_V001); break;
5705 case 1: gen_helper_neon_paddl_u32(CPU_V001); break;
5706 case 2: tcg_gen_add_i64(CPU_V001); break;
5717 case NEON_2RM_VTRN:
5730 case NEON_2RM_VUZP:
5735 case NEON_2RM_VZIP:
5740 case NEON_2RM_VMOVN: case NEON_2RM_VQMOVN:
5759 case NEON_2RM_VSHLL:
5773 case NEON_2RM_VCVT_F16_F32:
5797 case NEON_2RM_VCVT_F32_F16:
5832 case NEON_2RM_VREV32:
5834 case 0: tcg_gen_bswap32_i32(tmp, tmp); break;
5835 case 1: gen_swap_half(tmp); break;
5839 case NEON_2RM_VREV16:
5842 case NEON_2RM_VCLS:
5844 case 0: gen_helper_neon_cls_s8(tmp, tmp); break;
5845 case 1: gen_helper_neon_cls_s16(tmp, tmp); break;
5846 case 2: gen_helper_neon_cls_s32(tmp, tmp); break;
5850 case NEON_2RM_VCLZ:
5852 case 0: gen_helper_neon_clz_u8(tmp, tmp); break;
5853 case 1: gen_helper_neon_clz_u16(tmp, tmp); break;
5854 case 2: gen_helper_clz(tmp, tmp); break;
5858 case NEON_2RM_VCNT:
5861 case NEON_2RM_VMVN:
5864 case NEON_2RM_VQABS:
5866 case 0: gen_helper_neon_qabs_s8(tmp, tmp); break;
5867 case 1: gen_helper_neon_qabs_s16(tmp, tmp); break;
5868 case 2: gen_helper_neon_qabs_s32(tmp, tmp); break;
5872 case NEON_2RM_VQNEG:
5874 case 0: gen_helper_neon_qneg_s8(tmp, tmp); break;
5875 case 1: gen_helper_neon_qneg_s16(tmp, tmp); break;
5876 case 2: gen_helper_neon_qneg_s32(tmp, tmp); break;
5880 case NEON_2RM_VCGT0: case NEON_2RM_VCLE0:
5883 case 0: gen_helper_neon_cgt_s8(tmp, tmp, tmp2); break;
5884 case 1: gen_helper_neon_cgt_s16(tmp, tmp, tmp2); break;
5885 case 2: gen_helper_neon_cgt_s32(tmp, tmp, tmp2); break;
5893 case NEON_2RM_VCGE0: case NEON_2RM_VCLT0:
5896 case 0: gen_helper_neon_cge_s8(tmp, tmp, tmp2); break;
5897 case 1: gen_helper_neon_cge_s16(tmp, tmp, tmp2); break;
5898 case 2: gen_helper_neon_cge_s32(tmp, tmp, tmp2); break;
5906 case NEON_2RM_VCEQ0:
5909 case 0: gen_helper_neon_ceq_u8(tmp, tmp, tmp2); break;
5910 case 1: gen_helper_neon_ceq_u16(tmp, tmp, tmp2); break;
5911 case 2: gen_helper_neon_ceq_u32(tmp, tmp, tmp2); break;
5916 case NEON_2RM_VABS:
5918 case 0: gen_helper_neon_abs_s8(tmp, tmp); break;
5919 case 1: gen_helper_neon_abs_s16(tmp, tmp); break;
5920 case 2: tcg_gen_abs_i32(tmp, tmp); break;
5924 case NEON_2RM_VNEG:
5929 case NEON_2RM_VCGT0_F:
5934 case NEON_2RM_VCGE0_F:
5939 case NEON_2RM_VCEQ0_F:
5944 case NEON_2RM_VCLE0_F:
5949 case NEON_2RM_VCLT0_F:
5954 case NEON_2RM_VABS_F:
5957 case NEON_2RM_VNEG_F:
5960 case NEON_2RM_VSWP:
5964 case NEON_2RM_VTRN:
5967 case 0: gen_neon_trn_u8(tmp, tmp2); break;
5968 case 1: gen_neon_trn_u16(tmp, tmp2); break;
5973 case NEON_2RM_VRECPE:
5976 case NEON_2RM_VRSQRTE:
5979 case NEON_2RM_VRECPE_F:
5982 case NEON_2RM_VRSQRTE_F:
5985 case NEON_2RM_VCVT_FS: /* VCVT.F32.S32 */
5988 case NEON_2RM_VCVT_FU: /* VCVT.F32.U32 */
5991 case NEON_2RM_VCVT_SF: /* VCVT.S32.F32 */
5994 case NEON_2RM_VCVT_UF: /* VCVT.U32.F32 */
6090 case 0:
6099 case 1:
6100 case 2:
6150 case 0:
6155 case 1:
6156 case 2:
6205 case 0:
6206 case 1:
6213 case 10:
6214 case 11:
6216 case 14:
6225 case 15:
6305 case 0:
6308 case 1:
6311 case 2:
6312 case 3:
6363 case 0:
6366 case 1:
6369 case 2:
6370 case 3:
6388 case 0:
6391 case 1:
6394 case 2:
6395 case 3:
6499 case 1: /* clrex */
6503 case 4: /* dsb */
6504 case 5: /* dmb */
6505 case 6: /* isb */
6525 case 0: offset = -4; break; /* DA */
6526 case 1: offset = 0; break; /* IA */
6527 case 2: offset = -8; break; /* DB */
6528 case 3: offset = 4; break; /* IB */
6541 case 0: offset = -8; break;
6542 case 1: offset = 4; break;
6543 case 2: offset = -4; break;
6544 case 3: offset = 0; break;
6567 case 0: offset = -4; break; /* DA */
6568 case 1: offset = 0; break; /* IA */
6569 case 2: offset = -8; break; /* DB */
6570 case 3: offset = 4; break; /* IB */
6582 case 0: offset = -8; break;
6583 case 1: offset = 4; break;
6584 case 2: offset = -4; break;
6585 case 3: offset = 0; break;
6704 case 0x0: /* move program status register */
6725 case 0x1:
6742 case 0x2:
6752 case 0x3:
6764 case 0x5: /* saturating add/subtract */
6779 case 7:
6794 case 0x8: /* signed multiply */
6795 case 0xa:
6796 case 0xc:
6797 case 0xe:
6891 case 0x00:
6898 case 0x01:
6905 case 0x02:
6922 case 0x03:
6930 case 0x04:
6938 case 0x05:
6946 case 0x06:
6954 case 0x07:
6962 case 0x08:
6969 case 0x09:
6976 case 0x0a:
6982 case 0x0b:
6988 case 0x0c:
6995 case 0x0d:
7009 case 0x0e:
7017 case 0x0f:
7032 case 0x0:
7033 case 0x1:
7044 case 0: case 1: case 2: case 3: case 6:
7066 case 4:
7077 case 8: case 9: case 10: case 11:
7078 case 12: case 13: case 14: case 15:
7113 case 0: /* ldrex */
7116 case 1: /* ldrexd */
7119 case 2: /* ldrexb */
7122 case 3: /* ldrexh */
7131 case 0: /* strex */
7134 case 1: /* strexd */
7137 case 2: /* strexb */
7140 case 3: /* strexh */
7181 case 1:
7184 case 2:
7188 case 3:
7240 case 0x4:
7241 case 0x5:
7243 case 0x6:
7244 case 0x7:
7253 case 0: /* Parallel add/subtract. */
7264 case 1:
7336 case 0: gen_sxtb16(tmp); break;
7337 case 2: gen_sxtb(tmp); break;
7338 case 3: gen_sxth(tmp); break;
7339 case 4: gen_uxtb16(tmp); break;
7340 case 6: gen_uxtb(tmp); break;
7341 case 7: gen_uxth(tmp); break;
7375 case 2: /* Multiplies (Type 3). */
7409 * operation, in which case we must set the Q flag.
7434 case 3:
7437 case 0: /* Unsigned sum of absolute differences. */
7450 case 0x20: case 0x24: case 0x28: case 0x2c:
7469 case 0x12: case 0x16: case 0x1a: case 0x1e: /* sbfx */
7470 case 0x32: case 0x36: case 0x3a: case 0x3e: /* ubfx */
7538 case 0x08:
7539 case 0x09:
7565 /* XXX: test invalid n == 0 case ? */
7603 /* special case: r15 = PC + 8 */
7659 case 0xa:
7660 case 0xb:
7676 case 0xc:
7677 case 0xd:
7678 case 0xe:
7683 case 0xf:
7716 case 0: /* and */
7720 case 1: /* bic */
7724 case 2: /* orr */
7728 case 3: /* orn */
7732 case 4: /* eor */
7736 case 8: /* add */
7742 case 10: /* adc */
7748 case 11: /* sbc */
7754 case 13: /* sub */
7760 case 14: /* rsb */
7826 16-bit instructions in case the second half causes an
7849 case 0: case 1: case 2: case 3:
7852 case 4:
8056 case 5:
8106 case 13: /* Misc data processing. */
8111 case 0: /* Register controlled shift. */
8123 case 1: /* Sign/zero extend. */
8132 case 0: gen_sxth(tmp); break;
8133 case 1: gen_uxth(tmp); break;
8134 case 2: gen_sxtb16(tmp); break;
8135 case 3: gen_uxtb16(tmp); break;
8136 case 4: gen_sxtb(tmp); break;
8137 case 5: gen_uxtb(tmp); break;
8151 case 2: /* SIMD add/subtract. */
8162 case 3: /* Other data processing. */
8178 case 0x0a: /* rbit */
8181 case 0x08: /* rev */
8184 case 0x09: /* rev16 */
8187 case 0x0b: /* revsh */
8190 case 0x10: /* sel */
8198 case 0x18: /* clz */
8207 case 4: case 5: /* 32-bit multiply. Sum of absolute differences. */
8212 case 0: /* 32 x 32 -> 32 */
8224 case 1: /* 16 x 16 -> 32 */
8233 case 2: /* Dual multiply add. */
8234 case 4: /* Dual multiply subtract. */
8244 * operation, in which case we must set the Q flag.
8256 case 3: /* 32 * 16 -> 32msb */
8273 case 5: case 6: /* 32 * 32 -> 32msb (SMMUL, SMMLA, SMMLS) */
8291 case 7: /* Unsigned sum of absolute differences. */
8303 case 6: case 7: /* 64-bit multiply, Divide. */
8366 case 6: case 7: case 14: case 15:
8380 case 8: case 9: case 10: case 11:
8424 case 0: /* msr cpsr. */
8435 case 1: /* msr spsr. */
8444 case 2: /* cps, nop-hint. */
8471 case 3: /* Special control operations. */
8475 case 2: /* clrex */
8478 case 4: /* dsb */
8479 case 5: /* dmb */
8480 case 6: /* isb */
8487 case 4: /* bxj */
8492 case 5: /* Exception return. */
8503 case 6: /* mrs cpsr. */
8514 case 7: /* mrs spsr. */
8562 case 2: /* Signed bitfield extract. */
8569 case 6: /* Unsigned bitfield extract. */
8576 case 3: /* Bitfield insert/clear. */
8586 case 7:
8655 case 0: /* XY */
8658 case 1: /* 00XY00XY */
8661 case 2: /* XY00XY00 */
8665 case 3: /* XYXYXYXY */
8699 case 12: /* Load/store single data item. */
8765 case 0x0: /* Shifted Register. */
8777 case 0xc: /* Negative offset. */
8780 case 0xe: /* User privilege. */
8784 case 0x9: /* Post-decrement. */
8787 case 0xb: /* Post-increment. */
8791 case 0xd: /* Pre-decrement. */
8794 case 0xf: /* Pre-increment. */
8807 case 0: tmp = gen_ld8u(addr, user); break;
8808 case 4: tmp = gen_ld8s(addr, user); break;
8809 case 1: tmp = gen_ld16u(addr, user); break;
8810 case 5: tmp = gen_ld16s(addr, user); break;
8811 case 2: tmp = gen_ld32(addr, user); break;
8825 case 0: gen_st8(tmp, addr, user); break;
8826 case 1: gen_st16(tmp, addr, user); break;
8827 case 2: gen_st32(tmp, addr, user); break;
8877 case 0: case 1:
8918 case 2: case 3:
8933 case 1: /* cmp */
8938 case 2: /* add */
8946 case 3: /* sub */
8957 case 4:
8976 case 0: /* add */
8983 case 1: /* cmp */
8990 case 2: /* mov/cpy */
8994 case 3:/* branch [and link] exchange thumb register */
9035 case 0x0: /* and */
9040 case 0x1: /* eor */
9045 case 0x2: /* lsl */
9053 case 0x3: /* lsr */
9061 case 0x4: /* asr */
9069 case 0x5: /* adc */
9075 case 0x6: /* sbc */
9081 case 0x7: /* ror */
9090 case 0x8: /* tst */
9095 case 0x9: /* neg */
9101 case 0xa: /* cmp */
9105 case 0xb: /* cmn */
9109 case 0xc: /* orr */
9114 case 0xd: /* mul */
9119 case 0xe: /* bic */
9124 case 0xf: /* mvn */
9147 case 5:
9162 case 0: /* str */
9165 case 1: /* strh */
9168 case 2: /* strb */
9171 case 3: /* ldrsb */
9174 case 4: /* ldr */
9177 case 5: /* ldrh */
9180 case 6: /* ldrb */
9183 case 7: /* ldrsh */
9192 case 6:
9212 case 7:
9232 case 8:
9252 case 9:
9271 case 10:
9287 case 11:
9291 case 0:
9301 case 2: /* sign/zero extend. */
9307 case 0: gen_sxth(tmp); break;
9308 case 1: gen_sxtb(tmp); break;
9309 case 2: gen_uxth(tmp); break;
9310 case 3: gen_uxtb(tmp); break;
9314 case 4: case 5: case 0xc: case 0xd:
9370 case 1: case 3: case 9: case 11: /* czb */
9386 case 15: /* IT, nop-hint. */
9397 case 0xe: /* bkpt */
9402 case 0xa: /* rev */
9408 case 0: tcg_gen_bswap32_i32(tmp, tmp); break;
9409 case 1: gen_rev16(tmp); break;
9410 case 3: gen_revsh(tmp); break;
9416 case 6: /* cps */
9450 case 12:
9488 case 13:
9512 case 14:
9525 case 15:
9604 * at the end of the TB, which we definitely want to do for the case
9774 case DISAS_NEXT:
9778 case DISAS_JUMP:
9779 case DISAS_UPDATE:
9783 case DISAS_TB_JUMP:
9786 case DISAS_WFI:
9789 case DISAS_SWI:
9792 case DISAS_SMC:
