Lines Matching refs:CP0_Config0
67 int32_t CP0_Config0;
104 .CP0_Config0 = MIPS_CONFIG0 | (MMU_TYPE_R4000 << CP0C0_MT),
125 .CP0_Config0 = MIPS_CONFIG0 | (MMU_TYPE_FMT << CP0C0_MT),
144 .CP0_Config0 = MIPS_CONFIG0 | (MMU_TYPE_R4000 << CP0C0_MT),
163 .CP0_Config0 = MIPS_CONFIG0 | (MMU_TYPE_FMT << CP0C0_MT),
182 .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
202 .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
222 .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
243 .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
266 .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
314 .CP0_Config0 = (1 << 17) | (0x1 << 9) | (0x1 << 6) | (0x2 << CP0C0_K0),
333 .CP0_Config0 = (1 << 17) | (0x1 << 9) | (0x1 << 6) | (0x2 << CP0C0_K0),
350 .CP0_Config0 = MIPS_CONFIG0 | (0x2 << CP0C0_AT) |
371 .CP0_Config0 = MIPS_CONFIG0 | (0x2 << CP0C0_AT) |
397 .CP0_Config0 = MIPS_CONFIG0 | (0x2 << CP0C0_AT) |
424 .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) | (0x2 << CP0C0_AT) |
