Lines Matching refs:src3
315 void Push(Register src1, Register src2, Register src3, Condition cond = al) {
317 ASSERT(!src2.is(src3));
318 ASSERT(!src1.is(src3));
320 if (src2.code() > src3.code()) {
321 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
324 str(src3, MemOperand(sp, 4, NegPreIndex), cond);
328 Push(src2, src3, cond);
335 Register src3,
339 ASSERT(!src2.is(src3));
340 ASSERT(!src1.is(src3));
343 ASSERT(!src3.is(src4));
345 if (src2.code() > src3.code()) {
346 if (src3.code() > src4.code()) {
349 src1.bit() | src2.bit() | src3.bit() | src4.bit(),
352 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
357 Push(src3, src4, cond);
361 Push(src2, src3, src4, cond);
377 void Pop(Register src1, Register src2, Register src3, Condition cond = al) {
379 ASSERT(!src2.is(src3));
380 ASSERT(!src1.is(src3));
382 if (src2.code() > src3.code()) {
383 ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
385 ldr(src3, MemOperand(sp, 4, PostIndex), cond);
389 Pop(src2, src3, cond);
397 Register src3,
401 ASSERT(!src2.is(src3));
402 ASSERT(!src1.is(src3));
405 ASSERT(!src3.is(src4));
407 if (src2.code() > src3.code()) {
408 if (src3.code() > src4.code()) {
411 src1.bit() | src2.bit() | src3.bit() | src4.bit(),
415 ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
418 Pop(src3, src4, cond);
422 Pop(src2, src3, src4, cond);
