Lines Matching refs:Code
8 // - Redistributions of source code must retain the above copyright notice,
31 // The original source code covered by the above license above has been
64 // If the compiler is allowed to use FPU then we can use FPU too in our code
85 // minimal set of features which is also allowed for generated code in the
95 // code generation.
149 return kNumbers[reg.code()];
183 // always the case inside code objects.
188 // Patch the code at the current address with the supplied instructions.
196 // Indicate that code has changed.
201 // Patch the code at the current PC with a call to the target address.
204 // Patch the code at the current address with a call to the target.
215 // Verify all Objects referred by code are NOT in new space.
340 // Set up code descriptor.
481 // Labels refer to positions in the (to be) generated code.
485 // generated code. pos() is the position the label refers to.
487 // Linked labels refer to unknown positions in the code
494 // code is conv to an 18-bit value addressing bytes, hence the -4 value.
715 // Make label relative to Code* of generated Code object.
716 instr_at_put(pos, target_pos + (Code::kHeaderSize - kHeapObjectTag));
860 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
861 | (rd.code() << kRdShift) | (sa << kSaShift) | func;
873 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
887 Instr instr = opcode | fmt | (ft.code() << kFtShift) | (fs.code() << kFsShift)
888 | (fd.code() << kFdShift) | func;
901 Instr instr = opcode | fmt | (rt.code() << kRtShift)
902 | (fs.code() << kFsShift) | (fd.code() << kFdShift) | func;
915 opcode | fmt | (rt.code() << kRtShift) | (fs.code() << kFsShift) | func;
927 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
938 Instr instr = opcode | (rs.code() << kRsShift) | SF | (j & kImm16Mask);
949 Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift)
1035 instr_at_put(at_offset, target_pos + (Code::kHeaderSize - kHeapObjectTag));
1322 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift)
1323 | (rd.code() << kRdShift) | (sa << kSaShift) | SRL;
1332 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift)
1333 | (rd.code() << kRdShift) | (1 << kSaShift) | SRLV;
1458 void Assembler::break_(uint32_t code, bool break_as_stop) {
1459 ASSERT((code & ~0xfffff) == 0);
1464 code <= kMaxStopCode &&
1465 code > kMaxWatchpointCode) ||
1467 (code > kMaxStopCode ||
1468 code <= kMaxWatchpointCode)));
1469 Instr break_instr = SPECIAL | BREAK | (code << 6);
1474 void Assembler::stop(const char* msg, uint32_t code) {
1475 ASSERT(code > kMaxWatchpointCode);
1476 ASSERT(code <= kMaxStopCode);
1483 break_(code, true);
1489 void Assembler::tge(Register rs, Register rt, uint16_t code) {
1490 ASSERT(is_uint10(code));
1491 Instr instr = SPECIAL | TGE | rs.code() << kRsShift
1492 | rt.code() << kRtShift | code << 6;
1497 void Assembler::tgeu(Register rs, Register rt, uint16_t code) {
1498 ASSERT(is_uint10(code));
1499 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift
1500 | rt.code() << kRtShift | code << 6;
1505 void Assembler::tlt(Register rs, Register rt, uint16_t code) {
1506 ASSERT(is_uint10(code));
1508 SPECIAL | TLT | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
1513 void Assembler::tltu(Register rs, Register rt, uint16_t code) {
1514 ASSERT(is_uint10(code));
1516 SPECIAL | TLTU | rs.code() << kRsShift
1517 | rt.code() << kRtShift | code << 6;
1522 void Assembler::teq(Register rs, Register rt, uint16_t code) {
1523 ASSERT(is_uint10(code));
1525 SPECIAL | TEQ | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
1530 void Assembler::tne(Register rs, Register rt, uint16_t code) {
1531 ASSERT(is_uint10(code));
1533 SPECIAL | TNE | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
1632 nextfpreg.setcode(fd.code() + 1);
1647 nextfpreg.setcode(fd.code() + 1);
1865 Instr instr = COP1 | fmt | ft.code() << 16 | fs.code() << kFsShift
1963 if (!own_buffer_) FATAL("external code buffer is too small");
2028 // Adjust code for new modes.
2168 // Must use 2 instructions to insure patchable code => just use lui and ori.
2174 // The following code is an optimization for the common case of Call()
2183 // load the register, but that code is left, since it makes it easy to
2186 // This optimization can only be applied if the rt-code from instr2 is the
2220 bool is_ret = static_cast<int>(GetRs(instr3)) == ra.code();
2233 uint32_t rd_field = ra.code() << kRdShift; // Return-address (ra) reg.
2269 code() << kRdShift; // Return-address (ra) reg.
