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Searched
defs:RegWidth
(Results
1 - 5
of
5
) sorted by null
/art/runtime/
gc_map.h
86
size_t
RegWidth
() const {
103
return NativeOffsetWidth() +
RegWidth
();
/art/runtime/verifier/
dex_gc_map.h
73
size_t
RegWidth
() const {
104
return DexPcWidth() +
RegWidth
();
/external/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp
66
template<unsigned
RegWidth
>
68
return SelectCVTFixedPosOperand(N, FixedPos,
RegWidth
);
84
unsigned
RegWidth
);
92
template<unsigned
RegWidth
>
94
return SelectTSTBOperand(N, FixedPos,
RegWidth
);
97
bool SelectTSTBOperand(SDValue N, SDValue &FixedPos, unsigned
RegWidth
);
117
unsigned
RegWidth
) {
141
if (FBits == 0 || FBits >
RegWidth
) return false;
179
uint32_t
RegWidth
= N.getValueType().getSizeInBits();
184
if (!A64Imms::isLogicalImm(
RegWidth
, CN->getZExtValue(), Bits)
[
all
...]
/external/llvm/include/llvm/Target/
TargetLowering.h
643
unsigned
RegWidth
= getRegisterType(Context, VT).getSizeInBits();
644
return (BitWidth +
RegWidth
- 1) /
RegWidth
;
[
all
...]
/external/llvm/lib/Target/AArch64/AsmParser/
AArch64AsmParser.cpp
330
template<unsigned
RegWidth
> bool isBitfieldWidth() const {
336
return CE->getValue() >= 1 && CE->getValue() <=
RegWidth
;
339
template<int
RegWidth
>
346
return CE->getValue() >= 1 && CE->getValue() <=
RegWidth
;
402
template<unsigned
RegWidth
> bool isLogicalImm() const {
409
return A64Imms::isLogicalImm(
RegWidth
, CE->getValue(), Bits);
412
template<unsigned
RegWidth
> bool isLogicalImmMOV() const {
413
if (!isLogicalImm<
RegWidth
>()) return false;
420
return !A64Imms::isMOVZImm(
RegWidth
, CE->getValue(), UImm16, Shift)
421
&& !A64Imms::isMOVNImm(
RegWidth
, CE->getValue(), UImm16, Shift)
[
all
...]
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