/external/llvm/unittests/ADT/ |
APIntTest.cpp | 22 APInt Shl = One.shl(0); 23 EXPECT_TRUE(Shl[0]); 24 EXPECT_FALSE(Shl[1]); 150 EXPECT_EQ(zero, one.shl(1)); 151 EXPECT_EQ(one, one.shl(0));
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/external/llvm/lib/Target/R600/ |
R600ISelLowering.cpp | [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
InstCombineMulDivRem.cpp | 61 if (I->getOpcode() == Instruction::Shl && !I->hasNoUnsignedWrap()) { 152 BinaryOperator *Shl = BinaryOperator::CreateShl(NewOp, NewCst); 153 if (I.hasNoSignedWrap()) Shl->setHasNoSignedWrap(); 154 if (I.hasNoUnsignedWrap()) Shl->setHasNoUnsignedWrap(); 155 return Shl; 860 APInt NC = C2->getValue().shl(C1->getLimitedValue(C1->getBitWidth()-1)); [all...] |
/external/llvm/include/llvm/MC/ |
MCExpr.h | 377 Shl, ///< Shift left. 454 return Create(Shl, LHS, RHS, Ctx);
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/external/llvm/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | 793 SDValue Shl = DAG.getNode(ISD::SHL, DL, VT, And, ShlCount); 805 InsertDAGNode(DAG, N, Shl); 806 DAG.ReplaceAllUsesWith(N, Shl); 819 if (Shift.getOpcode() != ISD::SHL || 838 SDValue NewShift = DAG.getNode(ISD::SHL, DL, VT, NewAnd, Shift.getOperand(1)); [all...] |
/external/v8/src/ |
hydrogen-instructions.cc | 167 void Range::Shl(int32_t value) { [all...] |
/external/chromium_org/v8/src/ |
hydrogen-instructions.cc | 268 void Range::Shl(int32_t value) { [all...] |
/external/llvm/bindings/ocaml/llvm/ |
llvm.ml | 162 | Shl [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
DAGCombiner.cpp | [all...] |