| /art/compiler/utils/arm/ |
| assembler_arm.h | 24 #include "utils/arm/managed_register_arm.h"
30 namespace arm { namespace in namespace:art
656 } // namespace arm
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| managed_register_arm.cc | 22 namespace arm { namespace in namespace:art
112 } // namespace arm
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| managed_register_arm_test.cc | 22 namespace arm { namespace in namespace:art
[all...] |
| managed_register_arm.h | 25 namespace arm { namespace in namespace:art
79 // An instance of class 'ManagedRegister' represents a single ARM register or a
80 // pair of core ARM registers (enum RegisterPair). A single register is either a
264 } // namespace arm
266 inline arm::ArmManagedRegister ManagedRegister::AsArm() const {
267 arm::ArmManagedRegister reg(id_);
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| assembler_arm.cc | 26 namespace arm { namespace in namespace:art
[all...] |
| constants_arm.h | 24 #include "arch/arm/registers_arm.h"
30 namespace arm { namespace in namespace:art
33 // simulate ARM instructions.
35 // Section references in the code refer to the "ARM Architecture Reference
36 // Manual" from July 2005 (available at http://www.arm.com/miscPDFs/14128.pdf)
163 // instructions. Based on the "Figure 3-1 ARM instruction set summary".
220 // The class Instr enables access to individual fields defined in the ARM
265 // Accessors for the different named fields used in the ARM encoding.
348 // See "ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition",
349 // section A5.1 "ARM instruction set encoding"
[all...] |
| /art/runtime/arch/arm/ |
| registers_arm.cc | 22 namespace arm { namespace in namespace:art
46 } // namespace arm
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| context_arm.h | 26 namespace arm { namespace in namespace:art
65 } // namespace arm
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| context_arm.cc | 25 namespace arm { namespace in namespace:art
102 } // namespace arm
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| registers_arm.h | 23 namespace arm { namespace in namespace:art
94 } // namespace arm
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| /art/runtime/ |
| disassembler_arm.h | 25 namespace arm { namespace in namespace:art
48 } // namespace arm
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| disassembler_arm.cc | 26 namespace arm { namespace in namespace:art
277 // TODO: a more complete ARM disassembler could generate wider opcodes.
521 // TODO: 64bit transfers between ARM core and extension registers.
[all...] |
| /art/compiler/trampolines/ |
| trampoline_compiler.cc | 20 #include "utils/arm/assembler_arm.h"
28 namespace arm { namespace in namespace:art
54 } // namespace arm
108 return arm::CreateTrampoline(abi, offset);
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| /art/compiler/jni/quick/arm/ |
| calling_convention_arm.h | 23 namespace arm { namespace in namespace:art
85 } // namespace arm
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| calling_convention_arm.cc | 19 #include "utils/arm/managed_register_arm.h"
22 namespace arm { namespace in namespace:art
89 // We spill the argument registers on ARM to free them up for scratch use, we then assume
211 } // namespace arm
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| /art/compiler/utils/ |
| managed_register.h | 22 namespace arm { namespace in namespace:art
44 arm::ArmManagedRegister AsArm() const;
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| assembler.h | 24 #include "arm/constants_arm.h"
38 namespace arm { namespace in namespace:art
92 friend class arm::ArmAssembler;
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| /external/libvpx/libvpx/build/make/ |
| rtcd.sh | 253 arm() { function
267 #include "vpx_ports/arm.h"
350 arm
354 arm
358 arm
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| /external/valgrind/main/coregrind/m_gdbserver/ |
| valgrind-low-arm.c | 58 { "", 512, 0 }, // as previous versions of arm <-> gdb placed
158 (entrypoint & 1 ? "thumb" : "arm"));
165 dlog (1, "%p fnname %s lookupsym failed?. Assume arm\n",
170 // Can't find function name. We assume this is arm
171 dlog (1, "%p unknown fnname?. Assume arm\n", C2v (pc));
188 VexGuestARMState* arm = (VexGuestARMState*) get_arch (set, tst); local
193 case 0: VG_(transfer) (&arm->guest_R0, buf, dir, size, mod); break;
194 case 1: VG_(transfer) (&arm->guest_R1, buf, dir, size, mod); break;
195 case 2: VG_(transfer) (&arm->guest_R2, buf, dir, size, mod); break;
196 case 3: VG_(transfer) (&arm->guest_R3, buf, dir, size, mod); break
[all...] |
| /external/compiler-rt/ |
| Android.mk | 152 # ARM-specific runtimes
154 lib/arm/aeabi_dcmp.S \
155 lib/arm/aeabi_fcmp.S \
156 lib/arm/aeabi_idivmod.S \
157 lib/arm/aeabi_ldivmod.S \
158 lib/arm/aeabi_memcmp.S \
159 lib/arm/aeabi_memcpy.S \
160 lib/arm/aeabi_memmove.S \
161 lib/arm/aeabi_memset.S \
162 lib/arm/aeabi_uidivmod.S
[all...] |
| /external/compiler-rt/make/platform/ |
| clang_linux.mk | 76 Configs += asan-arm-android
77 Arch.asan-arm-android := arm-android
105 SHARED_LIBRARY.asan-arm-android := 1
106 ANDROID_COMMON_FLAGS := -target arm-linux-androideabi \
109 CFLAGS.asan-arm-android := $(CFLAGS) -fPIC -fno-builtin \
110 $(ANDROID_COMMON_FLAGS) -mllvm -arm-enable-ehabi -fno-rtti
111 LDFLAGS.asan-arm-android := $(LDFLAGS) $(ANDROID_COMMON_FLAGS) -ldl \
112 -Wl,-soname=libclang_rt.asan-arm-android.so
130 FUNCTIONS.asan-arm-android := $(AsanFunctions) $(InterceptionFunctions)
[all...] |
| /external/kernel-headers/original/asm-arm/ |
| processor.h | 2 * linux/include/asm-arm/processor.h
27 u32 arm; member in union:debug_insn
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| /external/chromium_org/third_party/tcmalloc/chromium/src/base/ |
| elfcore.h | 40 /* We currently only support x86-32, x86-64, ARM, and MIPS on Linux.
233 /* ARM calling conventions are a little more tricky. A little assembly
237 struct arm_regs arm; member in struct:Frame
248 : : "r"(&f.arm) : "memory"); \
249 f.arm.uregs[16] = 0; \
253 f.arm.uregs[17] = cpsr; \
261 long fps = (f).arm.uregs[16]; \
263 (r) = (f).arm; \
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| /external/chromium_org/third_party/tcmalloc/vendor/src/base/ |
| elfcore.h | 40 /* We currently only support x86-32, x86-64, ARM, and MIPS on Linux.
233 /* ARM calling conventions are a little more tricky. A little assembly
237 struct arm_regs arm; member in struct:Frame
248 : : "r"(&f.arm) : "memory"); \
249 f.arm.uregs[16] = 0; \
253 f.arm.uregs[17] = cpsr; \
261 long fps = (f).arm.uregs[16]; \
263 (r) = (f).arm; \
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| /external/llvm/include/llvm/ADT/ |
| Triple.h | 48 arm, // ARM: arm, armv.*, xscale enumerator in enum:llvm::Triple::ArchType
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