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  /external/oprofile/events/arm/armv7/
events.h 2 {0x00, CTR(1) | CTR(2) | CTR(3) | CTR(4) | CTR(5) | CTR(6), 0, "PMNC_SW_INCR",
4 {0x01, CTR(1) | CTR(2) | CTR(3) | CTR(4) | CTR(5) | CTR(6), 0, "IFETCH_MISS"
    [all...]
  /external/oprofile/events/arm/armv6/
events.h 2 {0x00, CTR(0) | CTR(1), 0, "IFU_IFETCH_MISS",
4 {0x01, CTR(0) | CTR(1), 0, "CYCLES_IFU_MEM_STALL",
6 {0x02, CTR(0) | CTR(1), 0, "CYCLES_DATA_STALL",
8 {0x03, CTR(0) | CTR(1), 0, "ITLB_MISS",
10 {0x04, CTR(0) | CTR(1), 0, "DTLB_MISS"
    [all...]
  /external/oprofile/events/mips/74K/
events.h 2 {0x0, CTR(0) | CTR(1) | CTR(2) | CTR(3), 0, "CYCLES",
4 {0x1, CTR(0) | CTR(1) | CTR(2) | CTR(3), 0, "INSTRUCTIONS",
6 {0x2, CTR(0) | CTR(2), 0, "PREDICTED_JR_31"
    [all...]
  /external/oprofile/events/mips/1004K/
events.h 2 {0x0, CTR(0) | CTR(1), 0, "CYCLES",
4 {0x1, CTR(0) | CTR(1), 0, "INSTRUCTIONS",
6 {0xb, CTR(0) | CTR(1), 0, "DCACHE_MISSES",
8 {0x2, CTR(0), 0, "BRANCH_INSNS",
10 {0x3, CTR(0), 0, "JR_31_INSNS",
12 {0x4, CTR(0), 0, "JR_NON_31_INSNS",
14 {0x5, CTR(0), 0, "ITLB_ACCESSES"
    [all...]
  /external/oprofile/events/mips/34K/
events.h 2 {0x0, CTR(0) | CTR(1), 0, "CYCLES",
4 {0x1, CTR(0) | CTR(1), 0, "INSTRUCTIONS",
6 {0xb, CTR(0) | CTR(1), 0, "DCACHE_MISSES",
8 {0x2, CTR(0), 0, "BRANCH_INSNS",
10 {0x3, CTR(0), 0, "JR_31_INSNS",
12 {0x4, CTR(0), 0, "JR_NON_31_INSNS",
14 {0x5, CTR(0), 0, "ITLB_ACCESSES"
    [all...]
  /external/oprofile/events/mips/24K/
events.h 2 {0x0, CTR(0) | CTR(1), 0, "CYCLES",
4 {0x1, CTR(0) | CTR(1), 0, "INSTRUCTIONS",
6 {0xb, CTR(0) | CTR(1), 0, "DCACHE_MISSES",
8 {0x2, CTR(0), 0, "BRANCH_INSNS",
10 {0x3, CTR(0), 0, "JR_31_INSNS",
12 {0x4, CTR(0), 0, "JR_NON_31_INSNS",
14 {0x5, CTR(0), 0, "ITLB_ACCESSES"
    [all...]
  /external/chromium_org/crypto/
encryptor_nss.cc 22 case Encryptor::CTR:
23 // AES-CTR encryption uses ECB encryptor as a building block since
24 // NSS doesn't support CTR encryption mode.
48 DCHECK(CBC == mode || CTR == mode) << "Unsupported mode of operation";
66 case CTR:
84 return (mode_ == CTR) ?
93 GetMechanism(mode_), (mode_ == CTR ? CKA_ENCRYPT : CKA_DECRYPT),
98 return (mode_ == CTR) ?
148 LOG(ERROR) << "Counter value not set in CTR mode.";
encryptor.cc 51 if (mode_ != CTR)
63 DCHECK_EQ(CTR, mode_);
88 DCHECK_EQ(CTR, mode_);
encryptor_openssl.cc 59 DCHECK(mode == CBC || mode == CTR);
77 return (mode_ == CTR) ?
85 return (mode_ == CTR) ?
143 LOG(ERROR) << "Counter value not set in CTR mode.";
encryptor.h 28 CTR,
31 // This class implements a 128-bits counter to be used in AES-CTR encryption.
61 // If |mode| is CBC, |iv| must not be empty; if it is CTR, then |iv| must be
80 // Sets the counter value when in CTR mode. Currently only 128-bits
89 // Generates a mask using |counter_| to be used for encryption in CTR mode.
98 // This method is used only in CTR mode.
encryptor_unittest.cc 118 // - F.5.1 CTR-AES128.Encrypt
119 // - F.5.6 CTR-AES256.Encrypt
194 EXPECT_TRUE(encryptor.Init(sym_key.get(), crypto::Encryptor::CTR, ""));
226 EXPECT_TRUE(encryptor.Init(sym_key.get(), crypto::Encryptor::CTR, ""));
291 EXPECT_TRUE(encryptor.Init(key.get(), crypto::Encryptor::CTR, ""));
  /libcore/crypto/src/main/java/org/conscrypt/
OpenSSLCipher.java 54 CTR,
563 public static class CTR extends AES {
564 public CTR(Padding padding) {
565 super(Mode.CTR, padding);
568 public static class NoPadding extends CTR {
574 public static class PKCS5Padding extends CTR {
637 case CTR:
  /libcore/benchmarks/src/benchmarks/regression/
CipherBenchmark.java 66 CTR,
  /external/clang/lib/StaticAnalyzer/Core/
SVals.cpp 54 if (const FunctionTextRegion *CTR = R->getAs<FunctionTextRegion>())
55 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(CTR->getDecl()))
  /external/llvm/lib/Target/PowerPC/
PPCInstrInfo.cpp 43 cl::desc("Disable analysis for CTR loops"));
224 // Note: If the condition register is set to CTR or CTR8 then this is a
271 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
282 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
320 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
334 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
404 else if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8)
415 if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8)
439 if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8)
802 if (Cond[1].getReg() == PPC::CTR8 || Cond[1].getReg() == PPC::CTR)
    [all...]
PPCCTRLoops.cpp 1 //===-- PPCCTRLoops.cpp - Identify and generate CTR loops -----------------===//
11 // that decrement and test the count register (CTR) (bdnz and friends).
18 // Criteria for CTR loops:
21 // - No nested CTR loops.
68 STATISTIC(NumCTRLoops, "Number of loops converted to CTR loops");
146 INITIALIZE_PASS_BEGIN(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops",
151 INITIALIZE_PASS_END(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops",
159 INITIALIZE_PASS_BEGIN(PPCCTRLoopsVerify, "ppc-ctr-loops-verify"
    [all...]
  /external/oprofile/utils/
opcontrol 1385 CTR=`echo $HW_CTRS | awk "{print \\$$((f + 1))}"`
    [all...]
  /external/chromium_org/chromeos/cryptohome/
cryptohome_library.cc 184 if (!encryptor.Init(key, crypto::Encryptor::CTR, std::string())) {
215 if (!encryptor.Init(key, crypto::Encryptor::CTR, std::string())) {
  /external/oprofile/opcontrol/
opcontrol.cpp 47 #define CTR(n) (1<<(n))
393 verbose("idx: %d, name: %s, mask: %02x, ctr#: %d\n",
397 (event_info[event_idx].counters & CTR(num_events)) == 0) {
463 printf(" name: %s\n", find_event_name_from_id(num, CTR(i)));
  /external/lzma/Asm/x86/
AesOpt.asm 168 ; ---------- AES-CTR ----------
  /external/chromium_org/media/cdm/
aes_decryptor.cc 55 if (!encryptor.Init(key, crypto::Encryptor::CTR, "")) {
  /external/dropbear/libtomcrypt/src/headers/
tomcrypt_mac.h 102 #error EAX_MODE requires OMAC and CTR
107 symmetric_CTR ctr; member in struct:__anon19189
  /external/qemu/tcg/ppc/
tcg-target.c 386 #define CTR SPR(9, 0)
477 tcg_out32 (s, MTSPR | RS (0) | CTR);
494 tcg_out32 (s, MTSPR | RA (0) | CTR);
942 tcg_out32 (s, MTSPR | RS (3) | CTR);
    [all...]
  /external/qemu/tcg/ppc64/
tcg-target.c 378 #define CTR SPR(9, 0)
497 tcg_out32 (s, MTSPR | RS (0) | CTR);
522 tcg_out32 (s, MTSPR | RA (0) | CTR);
908 tcg_out32 (s, MTSPR | RS (3) | CTR);
    [all...]
  /external/dropbear/libtomcrypt/
crypt.tex     [all...]

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