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    Searched refs:BDNZ (Results 1 - 6 of 6) sorted by null

  /external/llvm/lib/Target/PowerPC/
PPCBranchSelector.cpp 118 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ ||
169 } else if (I->getOpcode() == PPC::BDNZ) {
174 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ)).addImm(2);
PPCInstrInfo.cpp 225 // BDNZ (imm == 1) or BDZ (imm == 0) branch.
264 LastInst->getOpcode() == PPC::BDNZ) {
311 SecondLastInst->getOpcode() == PPC::BDNZ) &&
367 I->getOpcode() != PPC::BDNZ8 && I->getOpcode() != PPC::BDNZ &&
379 I->getOpcode() != PPC::BDNZ8 && I->getOpcode() != PPC::BDNZ &&
406 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) :
417 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) :
437 // If this is really a bdnz-like condition, then it cannot be turned into a
    [all...]
PPCISelLowering.h 149 /// CHAIN = BDNZ CHAIN, DESTBB - These are used to create counter-based
151 BDNZ, BDZ,
PPCISelDAGToDAG.cpp     [all...]
PPCCTRLoops.cpp 11 // that decrement and test the count register (CTR) (bdnz and friends).
616 // Verify that all bdnz/bdz instructions are dominated by a loop mtctr before
627 if (Opc == PPC::BDNZ8 || Opc == PPC::BDNZ ||
PPCISelLowering.cpp 641 case PPCISD::BDNZ: return "PPCISD::BDNZ";
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