| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 492 int StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
501 void VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
506 void computeRegArea(CCState &CCInfo, MachineFunction &MF,
|
| ARMFastISel.cpp | [all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 185 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
189 CCInfo.AnalyzeReturn(Outs, RetCC_Sparc32);
246 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
250 CCInfo.AnalyzeReturn(Outs, CC_Sparc64);
344 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
346 CCInfo.AnalyzeFormalArguments(Ins, CC_Sparc32);
489 unsigned NumAllocated = CCInfo.getFirstUnallocated(ArgRegs, 6);
491 unsigned ArgOffset = CCInfo.getNextStackOffset();
542 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
544 CCInfo.AnalyzeFormalArguments(Ins, CC_Sparc64)
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 326 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
328 CCInfo.AnalyzeFormalArguments(Ins, CC_MSP430);
332 unsigned Offset = CCInfo.getNextStackOffset();
422 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
426 CCInfo.AnalyzeReturn(Outs, RetCC_MSP430);
472 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
475 CCInfo.AnalyzeCallOperands(Outs, CC_MSP430);
478 unsigned NumBytes = CCInfo.getNextStackOffset();
610 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
613 CCInfo.AnalyzeCallResult(Ins, RetCC_MSP430)
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| AArch64ISelLowering.h | 175 void SaveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG, SDLoc DL,
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| MipsISelLowering.h | 267 const CCState &getCCInfo() const { return CCInfo; }
320 CCState &CCInfo;
|
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 186 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
192 CCInfo.AllocateReg(AMDGPU::VGPR0);
193 CCInfo.AllocateReg(AMDGPU::VGPR1);
198 CCInfo.AllocateReg(AMDGPU::SGPR0);
199 CCInfo.AllocateReg(AMDGPU::SGPR1);
203 AnalyzeFormalArguments(CCInfo, Splits);
[all...] |
| R600ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 311 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
315 CCInfo.AnalyzeReturn(Outs, RetCC_Hexagon);
362 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
365 CCInfo.AnalyzeCallResult(Ins, RetCC_Hexagon);
399 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
421 CCInfo.AnalyzeCallOperands(Outs, CC_Hexagon_VarArg);
423 CCInfo.AnalyzeCallOperands(Outs, CC_Hexagon);
448 unsigned NumBytes = CCInfo.getNextStackOffset();
829 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
832 CCInfo.AnalyzeFormalArguments(Ins, CC_Hexagon)
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | 760 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, TM, ValLocs,
762 CCInfo.AnalyzeReturn(Outs, RetCC_X86);
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Bitcode/Reader/ |
| BitcodeReader.cpp | [all...] |
| /frameworks/compile/libbcc/bcinfo/BitReader_2_7/ |
| BitcodeReader.cpp | [all...] |
| /frameworks/compile/libbcc/bcinfo/BitReader_3_0/ |
| BitcodeReader.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 589 CCState CCInfo(CallConv, IsVarArg, MF, TM, ArgLocs, *DAG.getContext());
590 CCInfo.AnalyzeFormalArguments(Ins, CC_SystemZ);
657 int64_t StackSize = CCInfo.getNextStackOffset();
[all...] |
