| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUCodeEmitter.h | 21 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
22 virtual uint64_t getMachineOpValue(const MachineInstr &MI,
24 virtual unsigned GPR4AlignEncode(const MachineInstr &MI,
28 virtual unsigned GPR2AlignEncode(const MachineInstr &MI,
32 virtual uint64_t VOPPostEncode(const MachineInstr &MI,
36 virtual uint64_t i32LiteralEncode(const MachineInstr &MI,
40 virtual uint32_t SMRDmemriEncode(const MachineInstr &MI, unsigned OpNo)
|
| AMDGPUMCInstLower.h | 1 //===- AMDGPUMCInstLower.h MachineInstr Lowering Interface ------*- C++ -*-===//
16 class MachineInstr;
23 /// lower - Lower a MachineInstr to an MCInst
24 void lower(const MachineInstr *MI, MCInst &OutMI) const;
|
| AMDGPUInstrInfo.h | 37 class MachineInstr;
51 bool isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg,
54 unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
55 unsigned isLoadFromStackSlotPostFE(const MachineInstr *MI,
57 bool hasLoadFromStackSlot(const MachineInstr *MI,
60 unsigned isStoreFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
61 unsigned isStoreFromStackSlotPostFE(const MachineInstr *MI,
63 bool hasStoreFromStackSlot(const MachineInstr *MI,
67 MachineInstr *
90 MachineInstr *foldMemoryOperandImpl(MachineFunction &MF
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUCodeEmitter.h | 21 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
22 virtual uint64_t getMachineOpValue(const MachineInstr &MI,
24 virtual unsigned GPR4AlignEncode(const MachineInstr &MI,
28 virtual unsigned GPR2AlignEncode(const MachineInstr &MI,
32 virtual uint64_t VOPPostEncode(const MachineInstr &MI,
36 virtual uint64_t i32LiteralEncode(const MachineInstr &MI,
40 virtual uint32_t SMRDmemriEncode(const MachineInstr &MI, unsigned OpNo)
|
| AMDGPUMCInstLower.h | 1 //===- AMDGPUMCInstLower.h MachineInstr Lowering Interface ------*- C++ -*-===//
16 class MachineInstr;
23 /// lower - Lower a MachineInstr to an MCInst
24 void lower(const MachineInstr *MI, MCInst &OutMI) const;
|
| AMDGPUInstrInfo.h | 37 class MachineInstr;
51 bool isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg,
54 unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
55 unsigned isLoadFromStackSlotPostFE(const MachineInstr *MI,
57 bool hasLoadFromStackSlot(const MachineInstr *MI,
60 unsigned isStoreFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
61 unsigned isStoreFromStackSlotPostFE(const MachineInstr *MI,
63 bool hasStoreFromStackSlot(const MachineInstr *MI,
67 MachineInstr *
90 MachineInstr *foldMemoryOperandImpl(MachineFunction &MF
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXutil.h | 18 #include "llvm/CodeGen/MachineInstr.h"
21 bool isParamLoad(const MachineInstr *);
|
| NVPTXInstrInfo.h | 38 * virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
40 * virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
55 virtual bool isMoveInstr(const MachineInstr &MI, unsigned &SrcReg,
57 bool isLoadInstr(const MachineInstr &MI, unsigned &AddrSpace) const;
58 bool isStoreInstr(const MachineInstr &MI, unsigned &AddrSpace) const;
59 bool isReadSpecialReg(MachineInstr &MI) const;
61 virtual bool CanTailMerge(const MachineInstr *MI) const;
70 unsigned getLdStCodeAddrSpace(const MachineInstr &MI) const {
|
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 68 bool isTriviallyReMaterializable(const MachineInstr *MI,
83 virtual bool isReallyTriviallyReMaterializable(const MachineInstr *MI,
94 bool isReallyTriviallyReMaterializableGeneric(const MachineInstr *MI,
113 virtual bool isCoalescableExtInstr(const MachineInstr &MI,
124 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
132 virtual unsigned isLoadFromStackSlotPostFE(const MachineInstr *MI,
144 virtual bool hasLoadFromStackSlot(const MachineInstr *MI,
153 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
161 virtual unsigned isStoreToStackSlotPostFE(const MachineInstr *MI,
172 virtual bool hasStoreToStackSlot(const MachineInstr *MI
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUInstrInfo.h | 38 class MachineInstr;
53 bool isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg,
56 unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
57 unsigned isLoadFromStackSlotPostFE(const MachineInstr *MI,
59 bool hasLoadFromStackSlot(const MachineInstr *MI,
62 unsigned isStoreFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
63 unsigned isStoreFromStackSlotPostFE(const MachineInstr *MI,
65 bool hasStoreFromStackSlot(const MachineInstr *MI,
69 MachineInstr *
92 MachineInstr *foldMemoryOperandImpl(MachineFunction &MF
[all...] |
| AMDGPUMCInstLower.h | 1 //===- AMDGPUMCInstLower.h MachineInstr Lowering Interface ------*- C++ -*-===//
18 class MachineInstr;
27 /// \brief Lower a MachineInstr to an MCInst
28 void lower(const MachineInstr *MI, MCInst &OutMI) const;
|
| AMDGPUInstrInfo.cpp | 37 bool AMDGPUInstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
44 unsigned AMDGPUInstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
50 unsigned AMDGPUInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI,
56 bool AMDGPUInstrInfo::hasLoadFromStackSlot(const MachineInstr *MI,
62 unsigned AMDGPUInstrInfo::isStoreFromStackSlot(const MachineInstr *MI,
67 unsigned AMDGPUInstrInfo::isStoreFromStackSlotPostFE(const MachineInstr *MI,
72 bool AMDGPUInstrInfo::hasStoreFromStackSlot(const MachineInstr *MI,
79 MachineInstr *
121 MachineInstr *
123 MachineInstr *MI
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.h | 47 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
55 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
71 virtual bool analyzeCompare(const MachineInstr *MI,
89 SmallVectorImpl<MachineInstr*> &NewMIs) const;
100 SmallVectorImpl<MachineInstr*> &NewMIs) const;
102 virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
103 MachineInstr* MI,
107 virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
108 MachineInstr* MI,
110 MachineInstr* LoadMI) const
[all...] |
| HexagonMachineFunctionInfo.h | 29 std::vector<MachineInstr*> AllocaAdjustInsts;
34 std::map<const MachineInstr*, unsigned> PacketInfo;
48 void addAllocaAdjustInst(MachineInstr* MI) {
51 const std::vector<MachineInstr*>& getAllocaAdjustInsts() {
58 void setStartPacket(MachineInstr* MI) {
61 void setEndPacket(MachineInstr* MI) {
64 bool isStartPacket(const MachineInstr* MI) const {
68 bool isEndPacket(const MachineInstr* MI) const {
|
| /external/llvm/lib/Target/Mips/ |
| MipsAsmPrinter.h | 26 class MachineInstr;
33 void EmitInstrWithMacroNoAT(const MachineInstr *MI);
38 const MachineInstr *MI);
60 void EmitInstruction(const MachineInstr *MI);
70 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
73 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
76 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
77 void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O);
78 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
79 void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O)
[all...] |
| Mips16ISelLowering.h | 27 EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const;
49 MachineBasicBlock *emitSel16(unsigned Opc, MachineInstr *MI,
53 MachineInstr *MI,
57 MachineInstr *MI,
61 MachineInstr *MI,
66 MachineInstr *MI, MachineBasicBlock *BB) const;
70 MachineInstr *MI, MachineBasicBlock *BB) const;
74 MachineInstr *MI, MachineBasicBlock *BB )const;
|
| /external/llvm/lib/CodeGen/ |
| AntiDepBreaker.h | 33 typedef std::vector<std::pair<MachineInstr *, MachineInstr *> >
54 virtual void Observe(MachineInstr *MI, unsigned Count,
62 void UpdateDbgValue(MachineInstr *MI, unsigned OldReg, unsigned NewReg) {
|
| /external/llvm/include/llvm/CodeGen/ |
| LiveVariables.h | 38 #include "llvm/CodeGen/MachineInstr.h"
89 std::vector<MachineInstr*> Kills;
94 bool removeKill(MachineInstr *MI) {
95 std::vector<MachineInstr*>::iterator
104 MachineInstr *findKill(const MachineBasicBlock *MBB) const;
137 MachineInstr **PhysRegDef;
142 MachineInstr **PhysRegUse;
148 DenseMap<MachineInstr*, unsigned> DistanceMap;
153 bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI);
158 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI)
[all...] |
| MachineInstrBundle.h | 46 inline MachineInstr *getBundleStart(MachineInstr *MI) {
53 inline const MachineInstr *getBundleStart(const MachineInstr *MI) {
62 getBundleEnd(MachineInstr *MI) {
71 getBundleEnd(const MachineInstr *MI) {
83 /// MachineInstr, or all operands on a bundle of MachineInstrs. This class is
96 MachineInstr::mop_iterator OpI, OpE;
117 explicit MachineOperandIteratorBase(MachineInstr *MI, bool WholeBundle) {
199 SmallVectorImpl<std::pair<MachineInstr*, unsigned> > *Ops = 0)
[all...] |
| TargetSchedule.h | 29 class MachineInstr;
55 const MCSchedClassDesc *resolveSchedClass(const MachineInstr *MI) const;
88 unsigned getNumMicroOps(const MachineInstr *MI,
145 unsigned computeOperandLatency(const MachineInstr *DefMI, unsigned DefOperIdx,
146 const MachineInstr *UseMI, unsigned UseOperIdx)
155 unsigned computeInstrLatency(const MachineInstr *MI) const;
160 unsigned computeOutputLatency(const MachineInstr *DefMI, unsigned DefIdx,
161 const MachineInstr *DepMI) const;
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 45 virtual MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI,
75 bool isPredicated(const MachineInstr *MI) const;
77 ARMCC::CondCodes getPredicate(const MachineInstr *MI) const {
84 bool PredicateInstruction(MachineInstr *MI,
91 virtual bool DefinesPredicate(MachineInstr *MI,
94 virtual bool isPredicable(MachineInstr *MI) const;
96 /// GetInstSize - Returns the size of the specified MachineInstr.
98 virtual unsigned GetInstSizeInBytes(const MachineInstr* MI) const;
100 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
102 virtual unsigned isStoreToStackSlot(const MachineInstr *MI
[all...] |
| ARMHazardRecognizer.h | 24 class MachineInstr;
31 MachineInstr *LastMI;
|
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 112 inline static bool isLeaMem(const MachineInstr *MI, unsigned Op) {
123 inline static bool isMem(const MachineInstr *MI, unsigned Op) {
170 virtual bool isCoalescableExtInstr(const MachineInstr &MI,
174 unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
178 unsigned isLoadFromStackSlotPostFE(const MachineInstr *MI,
181 unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const;
185 unsigned isStoreToStackSlotPostFE(const MachineInstr *MI,
188 bool isReallyTriviallyReMaterializable(const MachineInstr *MI,
192 const MachineInstr *Orig,
195 /// Given an operand within a MachineInstr, insert preceding code to put i
[all...] |
| X86AsmPrinter.h | 43 virtual void EmitInstruction(const MachineInstr *MI) LLVM_OVERRIDE;
48 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O,
50 void printPCRelImm(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
53 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
56 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
60 void printMemReference(const MachineInstr *MI, unsigned Op, raw_ostream &O,
62 void printLeaMemReference(const MachineInstr *MI, unsigned Op, raw_ostream &O,
65 void printIntelMemReference(const MachineInstr *MI, unsigned Op,
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64.h | 26 class MachineInstr;
36 void LowerAArch64MachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
|
