| /dalvik/vm/compiler/codegen/arm/ |
| Codegen.h | 32 static ArmLIR *opRegImm(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
34 static ArmLIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
|
| ArmLIR.h | 171 typedef enum OpKind {
204 } OpKind;
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 64 /// OpKind - Specify what kind of operand this is. This discriminates the
66 unsigned char OpKind; // MachineOperandType
181 : OpKind(K), SubReg_TargetFlags(0), ParentMI(0) {}
185 MachineOperandType getType() const { return (MachineOperandType)OpKind; }
224 bool isReg() const { return OpKind == MO_Register; }
226 bool isImm() const { return OpKind == MO_Immediate; }
228 bool isCImm() const { return OpKind == MO_CImmediate; }
230 bool isFPImm() const { return OpKind == MO_FPImmediate; }
232 bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
234 bool isFI() const { return OpKind == MO_FrameIndex;
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| Codegen.h | 32 static MipsLIR *opRegImm(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
34 static MipsLIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
|
| MipsLIR.h | 203 typedef enum OpKind {
236 } OpKind;
|
| /art/compiler/dex/quick/mips/ |
| codegen_mips.h | 146 LIR* OpMem(OpKind op, int rBase, int disp);
148 LIR* OpReg(OpKind op, int r_dest_src);
151 LIR* OpRegImm(OpKind op, int r_dest_src1, int value);
152 LIR* OpRegMem(OpKind op, int r_dest, int rBase, int offset);
153 LIR* OpRegReg(OpKind op, int r_dest_src1, int r_src2);
154 LIR* OpRegRegImm(OpKind op, int r_dest, int r_src1, int value);
155 LIR* OpRegRegReg(OpKind op, int r_dest, int r_src1, int r_src2);
157 LIR* OpThreadMem(OpKind op, ThreadOffset thread_offset);
|
| utility_mips.cc | 115 LIR* MipsMir2Lir::OpReg(OpKind op, int r_dest_src) {
130 LIR* MipsMir2Lir::OpRegImm(OpKind op, int r_dest_src1,
161 LIR* MipsMir2Lir::OpRegRegReg(OpKind op, int r_dest, int r_src1, int r_src2) {
202 LIR* MipsMir2Lir::OpRegRegImm(OpKind op, int r_dest, int r_src1, int value) {
285 LIR* MipsMir2Lir::OpRegReg(OpKind op, int r_dest_src1, int r_src2) {
635 LIR* MipsMir2Lir::OpThreadMem(OpKind op, ThreadOffset thread_offset) {
640 LIR* MipsMir2Lir::OpMem(OpKind op, int rBase, int disp) {
651 LIR* MipsMir2Lir::OpRegMem(OpKind op, int r_dest, int rBase,
|
| /art/compiler/dex/quick/arm/ |
| codegen_arm.h | 145 LIR* OpMem(OpKind op, int rBase, int disp);
147 LIR* OpReg(OpKind op, int r_dest_src);
150 LIR* OpRegImm(OpKind op, int r_dest_src1, int value);
151 LIR* OpRegMem(OpKind op, int r_dest, int rBase, int offset);
152 LIR* OpRegReg(OpKind op, int r_dest_src1, int r_src2);
153 LIR* OpRegRegImm(OpKind op, int r_dest, int r_src1, int value);
154 LIR* OpRegRegReg(OpKind op, int r_dest, int r_src1, int r_src2);
156 LIR* OpThreadMem(OpKind op, ThreadOffset thread_offset);
168 LIR* OpRegRegRegShift(OpKind op, int r_dest, int r_src1, int r_src2, int shift);
169 LIR* OpRegRegShift(OpKind op, int r_dest_src1, int r_src2, int shift)
[all...] |
| utility_arm.cc | 220 LIR* ArmMir2Lir::OpReg(OpKind op, int r_dest_src) {
232 LIR* ArmMir2Lir::OpRegRegShift(OpKind op, int r_dest_src1, int r_src2,
348 LIR* ArmMir2Lir::OpRegReg(OpKind op, int r_dest_src1, int r_src2) {
352 LIR* ArmMir2Lir::OpRegRegRegShift(OpKind op, int r_dest, int r_src1,
418 LIR* ArmMir2Lir::OpRegRegReg(OpKind op, int r_dest, int r_src1, int r_src2) {
422 LIR* ArmMir2Lir::OpRegRegImm(OpKind op, int r_dest, int r_src1, int value) {
546 LIR* ArmMir2Lir::OpRegImm(OpKind op, int r_dest_src1, int value) {
1032 LIR* ArmMir2Lir::OpThreadMem(OpKind op, ThreadOffset thread_offset) {
1037 LIR* ArmMir2Lir::OpMem(OpKind op, int rBase, int disp) {
1049 LIR* ArmMir2Lir::OpRegMem(OpKind op, int r_dest, int rBase, int offset)
[all...] |
| /art/compiler/dex/quick/x86/ |
| codegen_x86.h | 146 LIR* OpMem(OpKind op, int rBase, int disp);
148 LIR* OpReg(OpKind op, int r_dest_src);
151 LIR* OpRegImm(OpKind op, int r_dest_src1, int value);
152 LIR* OpRegMem(OpKind op, int r_dest, int rBase, int offset);
153 LIR* OpRegReg(OpKind op, int r_dest_src1, int r_src2);
154 LIR* OpRegRegImm(OpKind op, int r_dest, int r_src1, int value);
155 LIR* OpRegRegReg(OpKind op, int r_dest, int r_src1, int r_src2);
157 LIR* OpThreadMem(OpKind op, ThreadOffset thread_offset);
164 void OpRegThreadMem(OpKind op, int r_dest, ThreadOffset thread_offset);
|
| utility_x86.cc | 115 LIR* X86Mir2Lir::OpReg(OpKind op, int r_dest_src) {
127 LIR* X86Mir2Lir::OpRegImm(OpKind op, int r_dest_src1, int value) {
153 LIR* X86Mir2Lir::OpRegReg(OpKind op, int r_dest_src1, int r_src2) {
198 LIR* X86Mir2Lir::OpRegMem(OpKind op, int r_dest, int rBase,
221 LIR* X86Mir2Lir::OpRegRegReg(OpKind op, int r_dest, int r_src1,
269 LIR* X86Mir2Lir::OpRegRegImm(OpKind op, int r_dest, int r_src,
295 LIR* X86Mir2Lir::OpThreadMem(OpKind op, ThreadOffset thread_offset) {
306 LIR* X86Mir2Lir::OpMem(OpKind op, int rBase, int disp) {
|
| /external/llvm/utils/TableGen/ |
| FastISelEmitter.cpp | 76 class OpKind {
81 OpKind() : Repr(OK_Invalid) {}
83 bool operator<(OpKind RHS) const { return Repr < RHS.Repr; }
84 bool operator==(OpKind RHS) const { return Repr == RHS.Repr; }
86 static OpKind getReg() { OpKind K; K.Repr = OK_Reg; return K; }
87 static OpKind getFP() { OpKind K; K.Repr = OK_FP; return K; }
88 static OpKind getImm(unsigned V) {
91 OpKind K; K.Repr = OK_Imm+V; return K
[all...] |
| /art/compiler/dex/portable/ |
| mir_to_gbc.h | 116 ::llvm::Value* GenArithOp(OpKind op, bool is_long, ::llvm::Value* src1,
118 void ConvertFPArithOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1,
124 void ConvertArithOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1,
126 void ConvertArithOpLit(OpKind op, RegLocation rl_dest, RegLocation rl_src1,
|
| /art/compiler/dex/quick/ |
| mir_to_lir.h | 418 void GenLong3Addr(OpKind first_op, OpKind second_op, RegLocation rl_dest,
[all...] |
| gen_common.cc | 185 OpKind op = kOpInvalid;
[all...] |
| /external/clang/utils/TableGen/ |
| NeonEmitter.cpp | 38 enum OpKind {
150 StringMap<OpKind> OpMap;
251 void genTargetTest(raw_ostream &OS, StringMap<OpKind> &EmittedMap,
[all...] |
| /art/compiler/dex/ |
| compiler_enums.h | 159 enum OpKind {
196 std::ostream& operator<<(std::ostream& os, const OpKind& kind);
|
| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| Factory.cpp | 143 static ArmLIR *opNone(CompilationUnit *cUnit, OpKind op)
162 static ArmLIR *opImm(CompilationUnit *cUnit, OpKind op, int value)
179 static ArmLIR *opReg(CompilationUnit *cUnit, OpKind op, int rDestSrc)
193 static ArmLIR *opRegImm(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
250 static ArmLIR *opRegRegReg(CompilationUnit *cUnit, OpKind op, int rDest,
278 static ArmLIR *opRegRegImm(CompilationUnit *cUnit, OpKind op, int rDest,
373 static ArmLIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
|
| Gen.cpp | 124 static void genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp,
125 OpKind secondOp, RegLocation rlDest,
|
| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| Factory.cpp | 155 static MipsLIR *opNone(CompilationUnit *cUnit, OpKind op)
186 static MipsLIR *opReg(CompilationUnit *cUnit, OpKind op, int rDestSrc)
199 static MipsLIR *opRegRegImm(CompilationUnit *cUnit, OpKind op, int rDest,
201 static MipsLIR *opRegImm(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
234 static MipsLIR *opRegRegReg(CompilationUnit *cUnit, OpKind op, int rDest,
274 static MipsLIR *opRegRegImm(CompilationUnit *cUnit, OpKind op, int rDest,
365 static MipsLIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
|
| Gen.cpp | 132 static void genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp,
133 OpKind secondOp, RegLocation rlDest,
|
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| Factory.cpp | 241 static ArmLIR *opNone(CompilationUnit *cUnit, OpKind op)
259 static ArmLIR *opImm(CompilationUnit *cUnit, OpKind op, int value)
293 static ArmLIR *opReg(CompilationUnit *cUnit, OpKind op, int rDestSrc)
306 static ArmLIR *opRegRegShift(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
422 static ArmLIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
428 static ArmLIR *opRegRegRegShift(CompilationUnit *cUnit, OpKind op,
492 static ArmLIR *opRegRegReg(CompilationUnit *cUnit, OpKind op, int rDest,
498 static ArmLIR *opRegRegImm(CompilationUnit *cUnit, OpKind op, int rDest,
621 static ArmLIR *opRegImm(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
[all...] |
| Gen.cpp | 125 static void genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp,
126 OpKind secondOp, RegLocation rlDest,
|
| /external/clang/lib/Parse/ |
| ParseExpr.cpp | [all...] |
| /external/clang/lib/Sema/ |
| SemaExprCXX.cpp | [all...] |
