| /external/llvm/lib/Target/X86/ |
| X86InstrBuilder.h | 116 unsigned Reg2, bool isKill2) {
118 .addReg(Reg2, getKillRegState(isKill2)).addImm(0).addReg(0);
|
| X86FastISel.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| AggressiveAntiDepBreaker.h | 101 // UnionGroups - Union Reg1's and Reg2's groups to form a new
104 unsigned UnionGroups(unsigned Reg1, unsigned Reg2);
|
| TargetInstrInfo.cpp | 137 unsigned Reg2 = MI->getOperand(Idx2).getReg();
148 Reg0 = Reg2;
150 } else if (HasDef && Reg0 == Reg2 &&
168 MI->getOperand(Idx1).setReg(Reg2);
|
| AggressiveAntiDepBreaker.cpp | 79 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2)
86 unsigned Group2 = GetGroup(Reg2);
[all...] |
| StrongPHIElimination.cpp | 438 void StrongPHIElimination::unionRegs(unsigned Reg1, unsigned Reg2) {
440 Node *Node2 = RegNodeMap[Reg2]->getLeader();
|
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.h | 120 unsigned Reg1, unsigned Reg2) const;
|
| Mips16InstrInfo.cpp | 266 unsigned Reg1, unsigned Reg2) const {
270 // unsigned Reg2 = RegInfo.createVirtualRegister(&Mips::CPU16RegsRegClass);
273 // move reg2, sp
274 // add reg1, reg1, reg2
280 MachineInstrBuilder MIB2 = BuildMI(MBB, I, DL, get(Mips::MoveR3216), Reg2);
284 MIB3.addReg(Reg2, RegState::Kill);
|
| MipsISelLowering.cpp | [all...] |
| /external/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 80 bool contains(unsigned Reg1, unsigned Reg2) const {
81 return contains(Reg1) && contains(Reg2);
|
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | 81 bool contains(unsigned Reg1, unsigned Reg2) const {
82 return MC->contains(Reg1, Reg2);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb2SizeReduction.cpp | 647 unsigned Reg2 = MI->getOperand(2).getReg();
650 || !isARMLowRegister(Reg2))
652 if (Reg0 != Reg2) {
680 unsigned Reg2 = MI->getOperand(2).getReg();
681 if (Entry.LowRegs2 && !isARMLowRegister(Reg2))
[all...] |
| A15SDOptimizer.cpp | 90 unsigned Reg1, unsigned Reg2);
470 unsigned Reg1, unsigned Reg2) {
478 .addReg(Reg2)
|
| ARMFastISel.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 173 unsigned Reg2 = MI->getOperand(2).getReg();
193 unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg();
197 .addReg(Reg2, getKillRegState(Reg2IsKill))
204 MI->getOperand(0).setReg(Reg2);
206 MI->getOperand(1).setReg(Reg2);
[all...] |
| /external/llvm/lib/MC/ |
| MCDwarf.cpp | [all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.cpp | [all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
