/external/llvm/lib/CodeGen/ |
AllocationOrder.cpp | 31 const RegisterClassInfo &RegClassInfo) 35 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
|
RegAllocBase.h | 66 RegisterClassInfo RegClassInfo;
|
AllocationOrder.h | 37 /// @param RegClassInfo Information about reserved and allocatable registers. 40 const RegisterClassInfo &RegClassInfo);
|
RegAllocBase.cpp | 62 RegClassInfo.runOnMachineFunction(vrm.getMachineFunction()); 122 RegClassInfo.getOrder(MRI->getRegClass(VirtReg->reg)).front());
|
CriticalAntiDepBreaker.h | 39 const RegisterClassInfo &RegClassInfo;
|
AggressiveAntiDepBreaker.h | 122 const RegisterClassInfo &RegClassInfo;
|
RegAllocGreedy.cpp | 500 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo); 600 RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(VirtReg.reg)) < 601 RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(Intf->reg))); 700 unsigned MinCost = RegClassInfo.getMinCost(RC); 710 OrderLimit = RegClassInfo.getLastCostChange(RC); 722 if (unsigned CSR = RegClassInfo.getLastCalleeSavedAlias(PhysReg)) [all...] |
PostRASchedulerList.cpp | 83 RegisterClassInfo RegClassInfo; 260 RegClassInfo.runOnMachineFunction(Fn); 289 SchedulePostRATDList Scheduler(Fn, MLI, MDT, AA, RegClassInfo, AntiDepMode,
|
RegAllocBasic.cpp | 230 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo);
|
CriticalAntiDepBreaker.cpp | 35 RegClassInfo(RCI), 366 ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(RC);
|
MachineScheduler.cpp | 75 RegClassInfo = new RegisterClassInfo(); 79 delete RegClassInfo; 210 RegClassInfo->runOnMachineFunction(*MF); 461 TopRPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin); 462 BotRPTracker.init(&MF, RegClassInfo, LIS, BB, LiveRegionEnd); 498 unsigned Limit = RegClassInfo->getRegPressureSetLimit(i); 525 unsigned Limit = RegClassInfo->getRegPressureSetLimit(i); 589 RPTracker.init(&MF, RegClassInfo, LIS, BB, LiveRegionEnd, [all...] |
RegAllocFast.cpp | 60 RegisterClassInfo RegClassInfo; 535 ArrayRef<MCPhysReg> AO = RegClassInfo.getOrder(RC); [all...] |
AggressiveAntiDepBreaker.cpp | 123 RegClassInfo(RCI), 602 ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(SuperRC); [all...] |
RegisterCoalescer.cpp | 87 RegisterClassInfo RegClassInfo; [all...] |
/external/llvm/include/llvm/CodeGen/ |
MachineScheduler.h | 57 RegisterClassInfo *RegClassInfo; 207 RegisterClassInfo *RegClassInfo; 256 AA(C->AA), RegClassInfo(C->RegClassInfo), SchedImpl(S), DFSResult(0),
|