HomeSort by relevance Sort by last modified time
    Searched refs:RegSize (Results 1 - 6 of 6) sorted by null

  /external/llvm/lib/Target/Mips/
MipsSEFrameLowering.cpp 45 void expandLoadACC(MachineBasicBlock &MBB, Iter I, unsigned RegSize);
46 void expandStoreACC(MachineBasicBlock &MBB, Iter I, unsigned RegSize);
49 unsigned Src, unsigned RegSize);
153 unsigned RegSize) {
166 const TargetRegisterClass *RC = RegInfo.intRegClass(RegSize);
177 TII.loadRegFromStack(MBB, I, VR1, FI, RC, &RegInfo, RegSize);
182 unsigned RegSize) {
195 const TargetRegisterClass *RC = RegInfo.intRegClass(RegSize);
207 TII.storeRegToStack(MBB, I, VR1, true, FI, RC, &RegInfo, RegSize);
223 unsigned Src, unsigned RegSize) {
    [all...]
MipsISelLowering.cpp     [all...]
  /external/llvm/lib/Target/SystemZ/
SystemZInstrInfo.cpp 429 LogicOp() : RegSize(0), ImmLSB(0), ImmSize(0) {}
430 LogicOp(unsigned regSize, unsigned immLSB, unsigned immSize)
431 : RegSize(regSize), ImmLSB(immLSB), ImmSize(immSize) {}
433 operator bool() const { return RegSize; }
435 unsigned RegSize, ImmLSB, ImmSize;
504 if (And.RegSize == 64)
515 Imm |= allOnes(And.RegSize) & ~(allOnes(And.ImmSize) << And.ImmLSB);
517 if (isRxSBGMask(Imm, And.RegSize, Start, End)) {
  /external/llvm/include/llvm/MC/
MCRegisterInfo.h 41 const uint16_t RegSize, Alignment; // Size & Alignment of register in bytes
86 unsigned getSize() const { return RegSize; }
  /external/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGBuilder.cpp 720 unsigned RegSize = RegisterVT.getSizeInBits();
724 if (NumZeroBits == RegSize) {
736 if (NumSignBits == RegSize)
738 else if (NumZeroBits >= RegSize-1)
740 else if (NumSignBits > RegSize-8)
742 else if (NumZeroBits >= RegSize-8)
744 else if (NumSignBits > RegSize-16)
746 else if (NumZeroBits >= RegSize-16)
748 else if (NumSignBits > RegSize-32)
750 else if (NumZeroBits >= RegSize-32
    [all...]
  /external/clang/lib/CodeGen/
TargetInfo.cpp     [all...]

Completed in 301 milliseconds