/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
SIRegisterInfo.cpp | 29 BitVector Reserved(getNumRegs());
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R600RegisterInfo.cpp | 29 BitVector Reserved(getNumRegs());
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/external/mesa3d/src/gallium/drivers/radeon/ |
SIRegisterInfo.cpp | 29 BitVector Reserved(getNumRegs());
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R600RegisterInfo.cpp | 29 BitVector Reserved(getNumRegs());
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/external/llvm/lib/Target/R600/ |
SIRegisterInfo.cpp | 27 BitVector Reserved(getNumRegs()); 33 return RC->getNumRegs();
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R600RegisterInfo.cpp | 29 BitVector Reserved(getNumRegs());
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/external/llvm/lib/CodeGen/ |
RegisterClassInfo.cpp | 55 CSRNum.resize(TRI->getNumRegs(), 0); 82 unsigned NumRegs = RC->getNumRegs(); 175 unsigned NReserved = RC->getNumRegs() - getNumAllocatableRegs(RC);
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CriticalAntiDepBreaker.cpp | 36 Classes(TRI->getNumRegs(), static_cast<const TargetRegisterClass *>(0)), 37 KillIndices(TRI->getNumRegs(), 0), 38 DefIndices(TRI->getNumRegs(), 0), 39 KeepRegs(TRI->getNumRegs(), false) {} 46 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) { 100 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { 225 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) 435 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { 489 std::vector<unsigned> LastNewReg(TRI->getNumRegs(), 0);
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MachineRegisterInfo.cpp | 27 UsedPhysRegMask.resize(getTargetRegisterInfo()->getNumRegs()); 31 new MachineOperand*[getTargetRegisterInfo()->getNumRegs()]; 33 sizeof(MachineOperand*)*getTargetRegisterInfo()->getNumRegs()); 59 if (NewRC->getNumRegs() < MinNumRegs) 169 for (unsigned i = 1, e = getTargetRegisterInfo()->getNumRegs(); i != e; ++i) 404 assert(ReservedRegs.size() == getTargetRegisterInfo()->getNumRegs() &&
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TargetRegisterInfo.cpp | 43 else if (TRI && Reg < TRI->getNumRegs()) 132 BitVector Allocatable(getNumRegs());
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RegisterScavenging.cpp | 77 assert((NumPhysRegs == 0 || NumPhysRegs == TRI->getNumRegs()) && 87 NumPhysRegs = TRI->getNumRegs(); 272 BitVector Mask(TRI->getNumRegs());
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ExecutionDepsFix.cpp | 149 : MachineFunctionPass(ID), RC(rc), NumRegs(RC->getNumRegs()) {} 650 assert(NumRegs == RC->getNumRegs() && "Bad regclass"); 670 AliasMap.resize(TRI->getNumRegs(), -1); 671 for (unsigned i = 0, e = RC->getNumRegs(); i != e; ++i)
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AggressiveAntiDepBreaker.cpp | 148 State = new AggressiveAntiDepState(TRI->getNumRegs(), BB); 203 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { 494 BitVector BV(TRI->getNumRegs(), false); 745 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { [all...] |
CallingConvLower.cpp | 36 UsedRegs.resize((TRI.getNumRegs()+31)/32);
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/external/llvm/lib/Target/NVPTX/ |
NVPTXRegisterInfo.cpp | 95 BitVector Reserved(getNumRegs());
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/external/llvm/include/llvm/MC/ |
MCRegisterInfo.h | 58 /// getNumRegs - Return the number of registers in this class. 60 unsigned getNumRegs() const { return RegsSize; } 65 assert(i < getNumRegs() && "Register number out of range!"); 359 unsigned getNumRegs() const {
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/external/llvm/include/llvm/Target/ |
TargetRegisterInfo.h | 64 /// getNumRegs - Return the number of registers in this class. 66 unsigned getNumRegs() const { return MC->getNumRegs(); } 195 return OrderFunc ? OrderFunc(MF) : makeArrayRef(begin(), getNumRegs()); 431 /// The mask is an array containing (TRI::getNumRegs()+31)/32 entries. [all...] |
/external/llvm/lib/MC/ |
MCRegisterInfo.cpp | 39 assert(SubReg && SubReg < getNumRegs() && "This is not a register");
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/external/llvm/lib/Target/Mips/ |
MipsDelaySlotFiller.cpp | 292 : TRI(*TM.getRegisterInfo()), Defs(TRI.getNumRegs(), false), 293 Uses(TRI.getNumRegs(), false) {} 316 BitVector CallerSavedRegs(TRI.getNumRegs(), true); 352 BitVector NewDefs(TRI.getNumRegs()), NewUses(TRI.getNumRegs());
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MipsRegisterInfo.cpp | 117 BitVector Reserved(getNumRegs());
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/external/llvm/lib/Target/AArch64/ |
AArch64RegisterInfo.cpp | 62 BitVector Reserved(getNumRegs());
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/external/llvm/lib/Target/Sparc/ |
SparcRegisterInfo.cpp | 48 BitVector Reserved(getNumRegs());
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/external/llvm/lib/Target/SystemZ/ |
SystemZRegisterInfo.cpp | 39 BitVector Reserved(getNumRegs());
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/external/llvm/lib/Target/Hexagon/ |
HexagonCallingConvLower.cpp | 34 UsedRegs.resize((TM.getRegisterInfo()->getNumRegs()+31)/32);
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/external/llvm/lib/Target/MSP430/ |
MSP430RegisterInfo.cpp | 77 BitVector Reserved(getNumRegs());
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