| /external/llvm/include/llvm/MC/ |
| MCInstrAnalysis.h | 47 virtual bool isCall(const MCInst &Inst) const {
48 return Info->get(Inst.getOpcode()).isCall();
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| MCInstrDesc.h | 213 bool isCall() const {
268 if (isBranch() || isCall() || isReturn() || isIndirectBranch())
368 /// 3. Calling, branching, returning: use isCall/isReturn/isBranch.
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| /external/llvm/include/llvm/Support/ |
| CallSite.h | 70 /// isCall - true if a CallInst is enclosed.
71 /// Note that !isCall() does not mean it is an InvokeInst enclosed,
73 bool isCall() const { return I.getInt(); }
157 return isCall() \
163 if (isCall()) \
281 if (isCall())
288 if (isCall()) // Skip Callee
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| /external/llvm/lib/CodeGen/ |
| ErlangGC.cpp | 68 if (MI->getDesc().isCall()) {
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| ScheduleDAGInstrs.cpp | 209 (ExitMI->isCall() || ExitMI->isBarrier());
338 } else if (SU->isCall) {
349 if (!I->SU->isCall)
443 if (MI->isCall() || MI->hasUnmodeledSideEffects() ||
677 SU->isCall = MI->isCall();
[all...] |
| CriticalAntiDepBreaker.cpp | 163 bool Special = MI->isCall() ||
566 if (MI->isCall() || MI->hasExtraDefRegAllocReq() ||
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| MachineCopyPropagation.cpp | 96 if (I->hasUnmodeledSideEffects() || I->isCall() ||
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| GCStrategy.cpp | 383 if (MI->isCall())
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| PeepholeOptimizer.cpp | 523 if (MI->mayStore() || MI->isCall())
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| /external/llvm/lib/Target/PowerPC/ |
| PPCJITInfo.cpp | 49 static void EmitBranchToAt(uint64_t At, uint64_t To, bool isCall, bool is64Bit){
54 AtI[0] = BUILD_B(Offset, isCall); // b/bl target
59 AtI[3] = BUILD_BCTR(isCall); // bctr/bctrl
67 AtI[6] = BUILD_BCTR(isCall); // bctr/bctrl
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| /external/llvm/lib/Target/X86/ |
| X86PadShortFunction.cpp | 130 assert(ReturnLoc->isReturn() && !ReturnLoc->isCall() &&
187 if (MI->isReturn() && !MI->isCall()) {
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| X86VZeroUpper.cpp | 139 if (MI->isCall() && MO.isRegMask() && !clobbersAllYmmRegs(MO))
236 bool isControlFlow = MI->isCall() || MI->isReturn();
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| X86FixupLEAs.cpp | 195 if (CurInst->isCall() || CurInst->isInlineAsm())
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| /external/llvm/include/llvm/CodeGen/ |
| ScheduleDAG.h | 282 bool isCall : 1; // Is a function call.
315 Latency(0), isVRegCycle(false), isCall(false), isCallOp(false),
329 Latency(0), isVRegCycle(false), isCall(false), isCallOp(false),
342 Latency(0), isVRegCycle(false), isCall(false), isCallOp(false),
|
| /external/llvm/lib/Target/Mips/ |
| MipsDelaySlotFiller.cpp | 301 if (MI.isCall())
313 assert(MI.isCall());
543 assert((!I->isCall() && !I->isReturn() && !I->isBranch()) &&
578 if (DisableForwardSearch || !Slot->isCall())
719 return (Candidate.isTerminator() || Candidate.isCall() ||
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 94 SU->isCall = Old->isCall;
358 if (N->isMachineOpcode() && TII->get(N->getMachineOpcode()).isCall())
359 NodeSUnit->isCall = true;
376 if (N->isMachineOpcode() && TII->get(N->getMachineOpcode()).isCall())
377 NodeSUnit->isCall = true;
383 if (NodeSUnit->isCall)
[all...] |
| ScheduleDAGRRList.cpp | 643 if (SU->isCall)
691 if (SU->isCall) {
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonVLIWPacketizer.cpp | 382 return (MI->getDesc().isTerminator() || MI->getDesc().isCall());
[all...] |
| HexagonMachineScheduler.cpp | 30 if (SUnits[su].getInstr()->isCall())
326 if (!isTop() && SU->isCall) {
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| /external/llvm/lib/Target/Sparc/ |
| DelaySlotFiller.cpp | 175 if (slot->isCall())
336 if (!I->isCall())
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| /external/llvm/lib/MC/ |
| MCObjectDisassembler.cpp | 136 if (MIA.isCall(II->Inst))
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| /external/llvm/utils/TableGen/ |
| CodeGenInstruction.h | 226 bool isCall;
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| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfException.cpp | 187 assert(MI->isCall() && "This should be a call instruction!");
246 if (MI->isCall())
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| /external/llvm/include/llvm/ |
| InstVisitor.h | 242 if (CS.isCall())
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| /external/llvm/lib/Analysis/IPA/ |
| InlineCost.cpp | 707 if (CS.isCall() && cast<CallInst>(CS.getInstruction())->canReturnTwice() &&
714 if (CS.isCall() &&
[all...] |
