/external/llvm/lib/Target/SystemZ/ |
SystemZInstrBuilder.h | 33 if (MCID.mayLoad())
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/external/llvm/lib/Target/ARM/ |
ARMHazardRecognizer.cpp | 56 (LastMI->mayLoad() || LastMI->mayStore())) &&
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/external/llvm/lib/CodeGen/ |
TargetInstrInfo.cpp | 372 NewMI->mayLoad()) && 473 if (MI->mayLoad() && !MI->isInvariantLoad(AA)) 626 if (DefMI->mayLoad()) 640 return MI->mayLoad() ? 2 : 1;
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ScheduleDAGInstrs.cpp | 445 (!MI->mayLoad() || !MI->isInvariantLoad(AA)))) 615 Dep.setLatency(((*I)->getInstr()->mayLoad()) ? LatencyToLoad : 0); 779 && (HasVRegDef || MI->mayLoad())) { 827 if (AliasChain->getInstr()->mayLoad()) [all...] |
StackColoring.cpp | 575 bool TouchesMemory = I->mayLoad() || I->mayStore(); 614 if (!I->mayLoad() && !I->mayStore())
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MachineInstr.cpp | [all...] |
PeepholeOptimizer.cpp | 419 if (!MI->canFoldAsLoad() || !MI->mayLoad())
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EarlyIfConversion.cpp | 215 if (I->mayLoad()) {
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MachineCSE.cpp | 326 if (MI->mayLoad()) {
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MachineLICM.cpp | [all...] |
MachineVerifier.cpp | 781 if ((*I)->isLoad() && !MI->mayLoad()) 782 report("Missing mayLoad flag", MI); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsDelaySlotFiller.cpp | 390 if (!MI.mayStore() && !MI.mayLoad()) 398 SeenLoad |= MI.mayLoad(); 449 HasHazard |= MI.mayLoad() || OrigSeenStore; 451 SeenNoObjLoad |= MI.mayLoad();
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/external/llvm/lib/Target/PowerPC/ |
PPCHazardRecognizers.cpp | 96 isLoad = MCID.mayLoad();
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/external/llvm/lib/Target/X86/ |
X86InstrBuilder.h | 154 if (MCID.mayLoad())
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/external/llvm/include/llvm/MC/ |
MCInstrDesc.h | 115 MayLoad, 348 bool mayLoad() const { 349 return Flags & (1 << MCID::MayLoad); 367 /// 2. Memory accesses. Use mayLoad/mayStore.
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/external/llvm/utils/TableGen/ |
CodeGenInstruction.h | 228 bool mayLoad;
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CodeGenDAGPatterns.cpp | [all...] |
DAGISelMatcherGen.cpp | 660 return II.mayLoad || II.mayStore; 706 && (II.hasCtrlDep || II.mayLoad || II.mayStore || II.canFoldAsLoad || [all...] |
CodeGenInstruction.cpp | 317 mayLoad = R->getValueAsBitOrUnset("mayLoad", mayLoad_Unset);
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InstrInfoEmitter.cpp | 465 if (Inst.mayLoad) OS << "|(1<<MCID::MayLoad)";
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/external/llvm/lib/Target/Mips/AsmParser/ |
MipsAsmParser.cpp | 460 if (MCID.mayLoad() || MCID.mayStore()) { 472 expandMemInst(Inst, IDLoc, Instructions, MCID.mayLoad(), true); 482 expandMemInst(Inst, IDLoc, Instructions, MCID.mayLoad(), false); 486 expandMemInst(Inst, IDLoc, Instructions, MCID.mayLoad(), false); [all...] |
/external/llvm/lib/Target/Sparc/ |
DelaySlotFiller.cpp | 222 if (candidate->mayLoad()) {
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/external/llvm/lib/Target/Hexagon/ |
HexagonVLIWPacketizer.cpp | 496 if (MI->getDesc().mayLoad()) { 510 llvm_unreachable("mayLoad or mayStore not set for Post Increment operation"); 587 PacketMI->getDesc().mayLoad() && [all...] |
/external/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 462 /// mayLoad - Return true if this instruction could possibly read memory. 465 bool mayLoad(QueryType Type = AnyInBundle) const { 471 return hasProperty(MCID::MayLoad, Type); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGISel.cpp | [all...] |