/art/compiler/dex/quick/mips/ |
call_mips.cc | 34 * we'll do a dummy JAL and reference our tables using r_RA as the 35 * base register. Note that r_RA will be used both as the base to 45 * jal BaseLabel ; stores "return address" (BaseLabel) in r_RA 48 * addiu rBase, r_RA, <table> - <BaseLabel> ; table relative to BaseLabel 57 * addu r_RA, r_disp 58 * jr r_RA 120 OpRegRegReg(kOpAdd, r_RA, r_RA, r_disp); 121 OpReg(kOpBx, r_RA); 132 * jal BaseLabel ; stores "return address" (BaseLabel) in r_RA [all...] |
target_mips.cc | 29 r_T9, r_K0, r_K1, r_GP, r_SP, r_FP, r_RA}; 31 r_RA}; 298 core_spill_mask_ |= (1 << r_RA); 371 Clobber(r_RA);
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mips_lir.h | 203 r_RA = 31,
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assemble_mips.cc | 435 * bal .+8 ; r_RA <- anchor 439 * addu r_AT, r_AT, r_RA 449 * bal .+8 ; r_RA <- anchor 453 * addu r_AT, r_AT, r_RA 499 LIR* addu = RawLIR(dalvik_offset, kMipsAddu, r_AT, r_AT, r_RA); 562 lir->operands[0], lir->operands[0], r_RA); [all...] |
utility_mips.cc | 127 return NewLIR2(opcode, r_RA, r_dest_src);
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/dalvik/vm/compiler/template/mips/ |
TEMPLATE_RESTORE_STATE.S | 51 lw ra, r_RA*4(a0) # restore ra
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TEMPLATE_SAVE_STATE.S | 63 sw ra, r_RA*4(a0) # save ra
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TEMPLATE_MEM_OP_DECODE.S | 78 sw ra, r_RA*-4(sp) # push RA 125 lw ra, r_RA*-4(sp) # pop RA
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header.S | 77 #define r_RA 31
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/dalvik/vm/compiler/codegen/mips/ |
CodegenFactory.cpp | 347 newLIR2(cUnit, kMipsJalr, r_RA, r_T9);
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MipsLIR.h | 275 r_RA = 31,
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CodegenDriver.cpp | [all...] |
RallocUtil.cpp | 467 dvmCompilerClobber(cUnit, r_RA); [all...] |
Assemble.cpp | [all...] |
/dalvik/vm/compiler/template/out/ |
CompilerTemplateAsm-mips.S | 84 #define r_RA 31 [all...] |
/dalvik/vm/compiler/codegen/mips/Mips32/ |
Factory.cpp | 196 return newLIR2(cUnit, opcode, r_RA, rDestSrc);
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