| /dalvik/vm/compiler/codegen/mips/ |
| MipsLIR.h | 264 r_S4 = 20,
342 #define rINST r_S4
|
| CodegenDriver.cpp | 617 int regIndex = r_S4; /* Preserved across call */
620 // moved lock for r_S0 and r_S4 here from below since genBoundsCheck
623 dvmCompilerLockTemp(cUnit, regIndex); // r_S4
663 * Using fixed registers here, and counting on r_S0 and r_S4 being
[all...] |
| RallocUtil.cpp | 497 dvmCompilerClobber(cUnit, r_S4);
[all...] |
| /dalvik/vm/compiler/template/mips/ |
| TEMPLATE_RESTORE_STATE.S | 36 lw s4, r_S4*4(a0) # restore s4
|
| TEMPLATE_SAVE_STATE.S | 48 sw s4, r_S4*4(a0) # save s4
|
| TEMPLATE_MEM_OP_DECODE.S | 70 sw s4, r_S4*-4(sp) # push s4
117 lw s4, r_S4*-4(sp) # pop s4
|
| header.S | 66 #define r_S4 20
|
| /art/compiler/dex/quick/mips/ |
| mips_lir.h | 192 r_S4 = 20,
|
| target_mips.cc | 28 r_S0, r_S1, r_S2, r_S3, r_S4, r_S5, r_S6, r_S7, r_T8,
|
| /dalvik/vm/compiler/template/out/ |
| CompilerTemplateAsm-mips.S | 73 #define r_S4 20
[all...] |
| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| Factory.cpp | 26 r_T3, r_T4, r_T5, r_T6, r_T7, r_T8, r_T9, r_S0, r_S4};
|
