| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeIntegerTypes.cpp | 284 EVT VT = N->getValueType(0);
289 unsigned Opc = VT.isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
291 TLI.getTypeToTransformTo(*DAG.getContext(), VT),
618 // Truncate to NVT instead of VT
716 EVT VT = N->getValueType(0);
719 MVT RegVT = TLI.getRegisterType(*DAG.getContext(), VT);
720 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), VT);
[all...] |
| LegalizeVectorTypes.cpp | [all...] |
| SelectionDAG.cpp | 78 bool ConstantFPSDNode::isValueValidForType(EVT VT,
80 assert(VT.isFloatingPoint() && "Can only convert between FP types");
85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
669 EVT VT = cast<VTSDNode>(N)->getVT();
670 if (VT.isExtended()) {
671 Erased = ExtendedValueTypeNodes.erase(VT);
673 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
674 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
789 EVT VT = N->getValueType(0);
791 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &
[all...] |
| SelectionDAGBuilder.cpp | [all...] |
| DAGCombiner.cpp | 259 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
263 SDValue CombineConsecutiveLoads(SDNode *N, EVT VT);
336 /// legalization or if the specified VT is legal.
337 bool isTypeLegal(const EVT &VT) {
339 return TLI.isTypeLegal(VT);
344 EVT getSetCCResultType(EVT VT) const {
345 return TLI.getSetCCResultType(*DAG.getContext(), VT);
587 EVT VT = N0.getValueType();
592 DAG.FoldConstantArithmetic(Opc, VT,
595 return DAG.getNode(Opc, DL, VT, N0.getOperand(0), OpNode)
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 298 EVT AArch64TargetLowering::getSetCCResultType(LLVMContext &, EVT VT) const {
302 if (!VT.isVector()) return MVT::i32;
303 return VT.changeVectorElementTypeToInteger();
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | 179 bool isTypeLegal(Type *Ty, MVT &VT);
180 bool isLoadTypeLegal(Type *Ty, MVT &VT);
183 bool ARMEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
186 bool ARMEmitStore(MVT VT, unsigned SrcReg, Address &Addr,
189 void ARMSimplifyAddress(Address &Addr, MVT VT, bool useAM3);
194 unsigned ARMMaterializeFP(const ConstantFP *CFP, MVT VT);
195 unsigned ARMMaterializeInt(const Constant *C, MVT VT);
196 unsigned ARMMaterializeGV(const GlobalValue *GV, MVT VT);
197 unsigned ARMMoveToFPReg(MVT VT, unsigned SrcReg);
198 unsigned ARMMoveToIntReg(MVT VT, unsigned SrcReg)
[all...] |
| ARMISelLowering.cpp | 93 void ARMTargetLowering::addTypeForNEON(MVT VT, MVT PromotedLdStVT,
95 if (VT != PromotedLdStVT) {
96 setOperationAction(ISD::LOAD, VT, Promote);
97 AddPromotedToType (ISD::LOAD, VT, PromotedLdStVT);
99 setOperationAction(ISD::STORE, VT, Promote);
100 AddPromotedToType (ISD::STORE, VT, PromotedLdStVT);
103 MVT ElemTy = VT.getVectorElementType();
105 setOperationAction(ISD::SETCC, VT, Custom);
106 setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom);
107 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom)
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenDAGPatterns.cpp | 32 static inline bool isInteger(MVT::SimpleValueType VT) {
33 return EVT(VT).isInteger();
35 static inline bool isFloatingPoint(MVT::SimpleValueType VT) {
36 return EVT(VT).isFloatingPoint();
38 static inline bool isVector(MVT::SimpleValueType VT) {
39 return EVT(VT).isVector();
41 static inline bool isScalar(MVT::SimpleValueType VT) {
42 return !EVT(VT).isVector();
45 EEVT::TypeSet::TypeSet(MVT::SimpleValueType VT, TreePattern &TP) {
46 if (VT == MVT::iAny
[all...] |
| /external/clang/lib/Sema/ |
| SemaInit.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 414 EVT MipsTargetLowering::getSetCCResultType(LLVMContext &, EVT VT) const {
415 if (!VT.isVector())
417 return VT.changeVectorElementTypeToInteger();
[all...] |
| /external/clang/lib/AST/ |
| ASTContext.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 369 MVT::SimpleValueType VT = (MVT::SimpleValueType)i;
371 // add/sub are legal for all supported vector VT's.
372 setOperationAction(ISD::ADD , VT, Legal);
373 setOperationAction(ISD::SUB , VT, Legal);
376 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Promote);
377 AddPromotedToType (ISD::VECTOR_SHUFFLE, VT, MVT::v16i8);
380 setOperationAction(ISD::AND , VT, Promote);
381 AddPromotedToType (ISD::AND , VT, MVT::v4i32);
382 setOperationAction(ISD::OR , VT, Promote);
383 AddPromotedToType (ISD::OR , VT, MVT::v4i32)
[all...] |
| /external/clang/lib/Serialization/ |
| ASTReader.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 58 static SDValue getMOVL(SelectionDAG &DAG, SDLoc dl, EVT VT, SDValue V1,
66 EVT VT = Vec.getValueType();
67 EVT ElVT = VT.getVectorElementType();
68 unsigned Factor = VT.getSizeInBits()/vectorWidth;
70 VT.getVectorNumElements()/Factor);
124 EVT VT = Vec.getValueType();
125 EVT ElVT = VT.getVectorElementType();
164 static SDValue Concat128BitVectors(SDValue V1, SDValue V2, EVT VT,
167 SDValue V = Insert128BitVector(DAG.getUNDEF(VT), V1, 0, DAG, dl);
171 static SDValue Concat256BitVectors(SDValue V1, SDValue V2, EVT VT,
[all...] |
| /prebuilts/sdk/tools/lib/ |
| guava-10.0.1.jar | |
| lint.jar | |
| lint_api.jar | |
| lint_checks.jar | |
| /prebuilts/tools/common/m2/internal/org/gradle/gradle-tooling-api/1.6/ |
| gradle-tooling-api-1.6.jar | |
| /prebuilts/tools/common/m2/internal/org/gradle/gradle-tooling-api/1.6-rc-1/ |
| gradle-tooling-api-1.6-rc-1.jar | |
| /prebuilts/tools/common/m2/internal/org/gradle/gradle-tooling-api/1.7/ |
| gradle-tooling-api-1.7.jar | |
| /external/chromium_org/third_party/WebKit/Source/devtools/scripts/closure/ |
| compiler.jar | |
| /external/droiddriver/libs/ |
| guava-13.0.jar | |
| /prebuilts/devtools/tools/lib/ |
| guava-13.0.1.jar | |
