| /art/compiler/sea_ir/ir/ |
| sea.h | 133 // This vector has one entry for each predecessors, each with a single
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| sea.cc | 104 // For all other predecessors p of b, if idom is not set,
529 // with the accumulated set from all predecessors so far (from new_reaching).
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| /dalvik/dx/src/com/android/dx/rop/ |
| package-info.java | 74 * list). All blocks that are not exit predecessors must have at least one
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| /dalvik/dx/src/com/android/dx/ssa/back/ |
| SsaToRop.java | 187 * adding move instructions to predecessors based on phi insns.
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| /external/chromium_org/sync/internal_api/ |
| sync_manager_impl.h | 211 // Determine if the parents or predecessors differ between the old and new
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| /external/clang/lib/Analysis/ |
| ReachableCode.cpp | 137 // No dead code. Possibly an empty block. Look at dead predecessors.
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| /external/clang/lib/StaticAnalyzer/Checkers/ |
| UnreachableCodeChecker.cpp | 214 // If there are no predecessors, then this block is trivially unreachable
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| /external/dexmaker/src/dx/java/com/android/dx/ssa/back/ |
| SsaToRop.java | 188 * adding move instructions to predecessors based on phi insns.
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| /external/llvm/include/llvm/Analysis/ |
| BlockFrequencyImpl.h | 131 /// BB has none or more predecessors.
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| /external/llvm/include/llvm/CodeGen/ |
| FunctionLoweringInfo.h | 190 /// called when a block is visited before all of its predecessors.
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| MachineScheduler.h | 351 /// Release ExitSU predecessors and setup scheduler queues.
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| /external/llvm/lib/Transforms/IPO/ |
| LoopExtractor.cpp | 225 // Look through the landing pad's predecessors. If one of them ends in an
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| /external/llvm/lib/Transforms/ObjCARC/ |
| DependencyAnalysis.cpp | 228 // Add the predecessors to the worklist.
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| /external/llvm/lib/Transforms/Scalar/ |
| Sink.cpp | 190 // If the block has multiple predecessors, this would introduce computation
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| EarlyCSE.cpp | 414 // in this block. If this block has multiple predecessors, then they could
417 // predecessors.
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| LoopRotation.cpp | 480 // findNearestCommonDominator on all CFG predecessors of each child of the
505 // predecessors, continue until we reach a fixpoint.
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| /external/llvm/lib/Transforms/Utils/ |
| SimplifyCFG.cpp | 467 // predecessors unless there is only one predecessor.
764 /// See if any of the predecessors of the terminator block are value comparisons
[all...] |
| /dalvik/dx/src/com/android/dx/ssa/ |
| SsaMethod.java | 232 * a single {@code GOTO}. Successors and predecessors are not yet
343 * predecessors (or are the start block)
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/ |
| SsaMethod.java | 233 * a single {@code GOTO}. Successors and predecessors are not yet
344 * predecessors (or are the start block)
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| /external/llvm/lib/CodeGen/ |
| ExecutionDepsFix.cpp | 338 // Detect back-edges from predecessors we haven't processed yet.
370 // Try to coalesce live-out registers from predecessors.
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| MachineVerifier.cpp | [all...] |
| ScheduleDAGInstrs.cpp | 579 // add that edge to the predecessors chain of SUb,
[all...] |
| /external/llvm/lib/Analysis/ |
| MemoryDependenceAnalysis.cpp | 636 /// the uncached case, this starts out as the set of predecessors we care
749 // the predecessors of this block. Add them to our worklist.
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonHardwareLoops.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGRRList.cpp | 525 // Bottom up: release predecessors
627 // has predecessors the cycle will be advanced when they are scheduled.
703 /// count of its predecessors. If a predecessor pending count is zero, add it to
734 // Update liveness of predecessors before successors to avoid treating a
788 /// unscheduled, incrcease the succ left count of its predecessors. Remove
[all...] |
