| /external/llvm/test/CodeGen/Mips/ |
| mips64intldst.ll | 22 %conv = sext i8 %0 to i64
23 ret i64 %conv
35 %conv = sext i16 %0 to i64
36 ret i64 %conv
48 %conv = sext i32 %0 to i64
49 ret i64 %conv
73 %conv = zext i8 %0 to i64
74 ret i64 %conv
86 %conv = zext i16 %0 to i64
87 ret i64 %conv
[all...] |
| lb1.ll | 11 %conv = sext i8 %0 to i32
12 store i32 %conv, i32* %i, align 4
|
| lh1.ll | 10 %conv = sext i16 %0 to i32
12 store i32 %conv, i32* %i, align 4
|
| lhu1.ll | 11 %conv = zext i16 %0 to i32
13 store i32 %conv, i32* %i, align 4
|
| setgek.ll | 12 %conv = zext i1 %cmp to i32
13 store i32 %conv, i32* @r1, align 4
|
| setltk.ll | 15 %conv = zext i1 %cmp to i32
16 store i32 %conv, i32* @r1, align 4
|
| setne.ll | 14 %conv = zext i1 %cmp to i32
15 store i32 %conv, i32* @r1, align 4
|
| setultk.ll | 15 %conv = zext i1 %cmp to i32
16 store i32 %conv, i32* @r1, align 4
|
| sitofp-selectcc-opt.ll | 16 %conv = sitofp i32 %lor.ext to double
18 %add = fadd double %conv, %1
|
| /external/llvm/test/CodeGen/X86/ |
| mcinst-lowering.ll | 21 %conv = zext i1 %cmp to i32 ; <i32> [#uses=1]
22 ret i32 %conv
30 %conv = sext i16 %ax to i32
31 ret i32 %conv
39 %conv = sext i32 %eax to i64
40 ret i64 %conv
|
| 2009-06-05-VariableIndexInsert.ll | 5 %conv = bitcast <2 x i64> %a to <8 x i16> ; <<8 x i16>> [#uses=1]
8 %vecins = insertelement <8 x i16> %conv, i16 %conv2, i32 %and ; <<8 x i16>> [#uses=1]
|
| pr3216.ll | 16 %conv = sext i8 %bf.val.sext to i32
17 ret i32 %conv
|
| uint_to_fp-2.ll | 31 %conv = uitofp i32 %vecext to float
32 ret float %conv
|
| /external/llvm/test/Transforms/InstCombine/ |
| 2011-05-28-swapmulsub.ll | 18 %conv = trunc i32 %tmp1 to i16
19 ret i16 %conv
38 %conv = trunc i32 %tmp2 to i16
39 ret i16 %conv
55 %conv = trunc i32 %tmp1 to i16
56 ret i16 %conv
|
| srem1.ll | 9 %conv = sext i32 %call to i64 ; <i64> [#uses=1]
10 %or = or i64 -1734012817166602727, %conv ; <i64> [#uses=1]
|
| zext-bool-add-sub.ll | 10 %conv = zext i1 %x to i32
13 %sub = add i32 %conv, 1
|
| /external/llvm/test/Transforms/LoopUnroll/ |
| 2011-10-01-NoopTrunc.ll | 13 ; CHECK: %conv = sext i8 %0 to i32
14 ; CHECK: %add.1 = add nsw i32 %conv.1, %conv
15 ; CHECK: %add.18 = add nsw i32 %conv.18, %add.17
26 %conv = sext i8 %0 to i32
27 %add = add nsw i32 %conv, %sum.02
|
| /external/chromium_org/third_party/skia/src/gpu/effects/ |
| GrConvolutionEffect.cpp | 113 const GrConvolutionEffect& conv = drawEffect.castEffect<GrConvolutionEffect>(); local
114 GrTexture& texture = *conv.texture(0);
116 GrAssert(conv.radius() == fRadius);
119 switch (conv.direction()) {
130 if (conv.useBounds()) {
131 const float* bounds = conv.bounds();
132 if (Gr1DKernelEffect::kY_Direction == conv.direction() &&
139 uman.set1fv(fKernelUni, 0, this->width(), conv.kernel());
140 fEffectMatrix.setData(uman, conv.getMatrix(), drawEffect, conv.texture(0))
145 const GrConvolutionEffect& conv = drawEffect.castEffect<GrConvolutionEffect>(); local
[all...] |
| /external/skia/src/gpu/effects/ |
| GrConvolutionEffect.cpp | 113 const GrConvolutionEffect& conv = drawEffect.castEffect<GrConvolutionEffect>(); local
114 GrTexture& texture = *conv.texture(0);
116 GrAssert(conv.radius() == fRadius);
119 switch (conv.direction()) {
130 if (conv.useBounds()) {
131 const float* bounds = conv.bounds();
132 if (Gr1DKernelEffect::kY_Direction == conv.direction() &&
139 uman.set1fv(fKernelUni, 0, this->width(), conv.kernel());
140 fEffectMatrix.setData(uman, conv.getMatrix(), drawEffect, conv.texture(0))
145 const GrConvolutionEffect& conv = drawEffect.castEffect<GrConvolutionEffect>(); local
[all...] |
| /external/clang/test/CodeGen/ |
| linetable-endscope.c | 8 // CHECK: store {{.*}}, !dbg ![[CONV:[0-9]+]]
14 // CHECK: ![[CONV]] = metadata !{i32 [[@LINE+1]], i32 0, metadata !{{.*}}, null}
|
| /external/llvm/test/CodeGen/Hexagon/ |
| combine.ll | 11 %conv = trunc i64 %1 to i32
12 %2 = call i64 @llvm.hexagon.A2.combinew(i32 %0, i32 %conv)
|
| absaddr-store.ll | 13 %conv = zext i8 %0 to i32
14 %mul = mul nsw i32 100, %conv
24 %conv = sext i16 %0 to i32
25 %mul = mul nsw i32 100, %conv
|
| /external/llvm/test/CodeGen/PowerPC/ |
| ppc64-abi-extend.ll | 38 %conv = sext i32 %x to i64
39 ret i64 %conv
47 %conv = zext i32 %x to i64
48 ret i64 %conv
75 %conv = sext i32 %call to i64
76 ret i64 %conv
88 %conv = zext i32 %call to i64
89 ret i64 %conv
|
| pr12757.ll | 8 %conv = trunc i64 %0 to i32
9 ret i32 %conv
|
| /external/llvm/test/MC/Mips/ |
| sext_64_32.ll | 9 %conv = sext i32 %ival to i64
10 ret i64 %conv
|
