/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
omxVCM4P10_FilterDeblockingChroma_VerEdge_I_s.s | 134 LDRB alpha1, [pAlphaArg,#1] 135 LDRB beta1, [pBetaArg,#1] 138 LDRB beta0, [pBetaArg] 140 LDRB alpha0, [pAlphaArg] 338 LDRB tC0, [pThresholds], #1 340 LDRB tC1, [pThresholds], #3
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omxVCM4P10_PredictIntraChroma_8x8_s.s | 170 LDRB tVal4, [pSrcLeft] ;// tVal4 = pSrcLeft[6] 171 LDRB tVal12,[pSrcLeft2] ;// tVal12= pSrcLeft[7] 388 LDRB tVal7, [pSrcAbove, #+7] ;// pSrcAbove[7] 389 LDRB tVal6, [pSrcLeft, +tVal14] ;// pSrcLeft[7*leftStep] 390 LDRB tVal8, [pSrcAboveLeft] ;// pSrcAboveLeft[0] 391 LDRB tVal9, [pSrcAbove, #+6 ] ;// pSrcAbove[6] 392 LDRB tVal10,[pSrcAbove] ;// pSrcAbove[0] 399 LDRB tVal8, [pSrcAbove,#+5] ;// pSrcAbove[5] 400 LDRB tVal10,[pSrcAbove,#+1] ;// pSrcAbove[1] 404 LDRB tVal9, [pSrcAbove,#+4] ;// pSrcAbove[4 [all...] |
omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 171 LDRB alpha0, [pAlphaArg] 172 LDRB beta0, [pBetaArg] 173 LDRB alpha1, [pAlphaArg,#1] 174 LDRB beta1, [pBetaArg,#1] 238 LDRB bS, [pBS], #4 461 LDRB tC0, [ptC0], #4
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/bionic/libc/arch-arm/generic/bionic/ |
strcpy.S | 99 ldrb r2, [r1], #1 128 ldrb r2, [r1], #1
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strcmp.S | 149 ldrb r2, [wp1], #1 150 ldrb r3, [wp2], #1 208 ldrb w2, [wp2]
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/external/libvpx/libvpx/vp8/common/arm/neon/ |
loopfiltersimplehorizontaledge_neon.asm | 94 ldrb r3, [r2] ; load blim from mem 112 ldrb r3, [r2] ; load blim from mem
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/system/core/libpixelflinger/codeflinger/ |
load_store.cpp | 82 LDRB(AL, s.reg, addr.reg, immed12_pre(0)); // R 83 LDRB(AL, s0, addr.reg, immed12_pre(1)); // G 85 LDRB(AL, s0, addr.reg, immed12_pre(2)); // B 89 LDRB(AL, s1, addr.reg, immed12_pre(0)); // R 90 LDRB(AL, s0, addr.reg, immed12_pre(1)); // G 92 LDRB(AL, s0, addr.reg, immed12_pre(2)); // B 103 if (inc) LDRB(AL, s.reg, addr.reg, immed12_post(1)); 104 else LDRB(AL, s.reg, addr.reg);
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/hardware/samsung_slsi/exynos5/libswconverter/ |
csc_tiled_to_linear_uv_deinterleave_neon.s | 142 ldrb r1, [r8], #1 143 ldrb r2, [r8], #1 223 ldrb r2, [r8], #1 224 ldrb r5, [r8], #1
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/bionic/libc/arch-arm/cortex-a15/bionic/ |
__strcat_chk.S | 73 ldrb r2, [r1], #1 81 ldrb r2, [r1], #1 83 ldrb r2, [r1], #1
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strlen.S | 75 ldrb r2, [r1], #1 83 ldrb r2, [r1], #1 85 ldrb r2, [r1], #1
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/bionic/libc/arch-arm/cortex-a9/bionic/ |
__strcat_chk.S | 140 ldrb r2, [r1], #1 146 ldrb r2, [r1], #1 148 ldrb r2, [r1], #1
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__strcpy_chk.S | 125 ldrb r2, [r0], #1 131 ldrb r2, [r0], #1 133 ldrb r2, [r0], #1
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strlen.S | 141 ldrb r2, [r1], #1 147 ldrb r2, [r1], #1 149 ldrb r2, [r1], #1
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/bionic/libc/arch-arm/krait/bionic/ |
__strcat_chk.S | 73 ldrb r2, [r1], #1 81 ldrb r2, [r1], #1 83 ldrb r2, [r1], #1
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/external/llvm/test/CodeGen/ARM/ |
fast-isel-ldr-str-thumb-neg-index.ll | 62 ; THUMB: ldrb r{{[0-9]}}, [r0, #-1] 71 ; THUMB: ldrb r{{[0-9]}}, [r0, #-255] 80 ; THUMB: ldrb r{{[0-9]}}, [r0]
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/external/valgrind/main/exp-bbv/tests/arm-linux/ |
ll.S | 56 ldrb r4,[r3],#+1 @ load a byte, increment pointer 69 ldrb r0,[r3],#+1 @ load a byte, increment pointer 70 ldrb r4,[r3],#+1 @ load a byte, increment pointer 88 ldrb r4,[r9,r7] @ load byte from text_buf[] 108 ldrb r4,[r3],#+1 @ load a byte, increment pointer 266 ldrb r5,[r7],#+1 @ load a byte, increment pointer 268 ldrb r5,[r7] @ load next byte 270 ldrb r5,[r7,#+1] @ load next byte 280 ldrb r5,[r7],#+1 @ load a byte, increment pointer 287 ldrb r5,[r7],#+1 @ load a byte, increment pointe [all...] |
/external/libvpx/libvpx/vp8/common/arm/armv6/ |
loopfilter_v6.asm | 72 ldrb r4, [r2] ; blimit 74 ldrb r2, [r3] ; limit 77 ldrb r3, [r6] ; thresh 279 ldrb r4, [r2] ; blimit 281 ldrb r2, [r3] ; limit 284 ldrb r3, [r6] ; thresh 592 ldrb r4, [r2] ; blimit 594 ldrb r2, [r3] ; limit 597 ldrb r3, [r12] ; thresh [all...] |
/bionic/libc/arch-arm/bionic/ |
strcmp.a15.S | 65 ldrb r2, [r0] 66 ldrb r3, [r1] 78 ldrb r2, [r0], #1 79 ldrb r3, [r1], #1 112 use LDRB to load and compare byte by byte until 243 ldrb ip, [r1], #1 250 ldrb ip, [r1], #1 257 ldrb ip, [r1], #1 617 ldrb r2, [wp1], #1 618 ldrb r3, [wp2], # [all...] |
strcmp.S | 149 ldrb r2, [wp1], #1 150 ldrb r3, [wp2], #1 208 ldrb w2, [wp2]
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/external/llvm/test/CodeGen/AArch64/ |
ldst-unsignedimm.ll | 28 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, #:lo12:var_8bit] 34 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, #:lo12:var_8bit] 43 ; This uses the fact that ldrb w0, [x0] will zero out the high 32-bits 48 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, #:lo12:var_8bit] 97 ; This uses the fact that ldrb w0, [x0] will zero out the high 32-bits 172 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, #1] 177 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, #4095]
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/external/llvm/test/MC/ARM/ |
arm-memory-instructions.s | 61 @ LDRB (immediate) 63 ldrb r3, [r8] 64 ldrb r1, [sp, #63] 65 ldrb r9, [r3, #4095]! 66 ldrb r8, [r1], #22 67 ldrb r2, [r7], #-19 69 @ CHECK: ldrb r3, [r8] @ encoding: [0x00,0x30,0xd8,0xe5] 70 @ CHECK: ldrb r1, [sp, #63] @ encoding: [0x3f,0x10,0xdd,0xe5] 71 @ CHECK: ldrb r9, [r3, #4095]! @ encoding: [0xff,0x9f,0xf3,0xe5] 72 @ CHECK: ldrb r8, [r1], #22 @ encoding: [0x16,0x80,0xd1,0xe4 [all...] |
/external/valgrind/main/coregrind/ |
m_trampoline.S | 558 ldrb r0, [r0, #0] @ zero_extendqisi2 565 ldrb r3, [r0, r2] @ zero_extendqisi2 573 // ldrb r3, [r0, #0] @ zero_extendqisi2 580 // ldrb r3, [r0, #1]! @ zero_extendqisi2 609 ldrb r3, [r1, #4] @ zero_extendqisi2 612 ldrb r2, [r1, #3] @ zero_extendqisi2 615 ldrb r3, [r1, #2] @ zero_extendqisi2 618 ldrb r2, [r1, #1] @ zero_extendqisi2 630 ldrb r3, [r0], #-1 @ zero_extendqisi2 643 ldrb r3, [r1, #0] @ zero_extendqisi [all...] |
/external/chromium_org/third_party/openssl/openssl/crypto/modes/asm/ |
ghash-armv4.S | 34 ldrb r12,[r2,#15] 35 ldrb r14,[r0,#15] 45 ldrb r12,[r2,#14] 53 ldrb r14,[r0,#14] 180 ldrb r12,[r0,#15] 189 ldrb r12,[r0,#14]
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/external/openssl/crypto/modes/asm/ |
ghash-armv4.S | 34 ldrb r12,[r2,#15] 35 ldrb r14,[r0,#15] 45 ldrb r12,[r2,#14] 53 ldrb r14,[r0,#14] 180 ldrb r12,[r0,#15] 189 ldrb r12,[r0,#14]
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/external/tremolo/Tremolo/ |
mdctLARM.s | 197 LDRB r6, [r10,#-1]! @ r6 = *--wR 198 LDRB r11,[r9],#1 @ r11= *wL++ 237 LDRB r11,[r9],#1 @ r11= *wL++ 238 LDRB r6, [r10,#-1]! @ r6 = *--wR 320 LDRB r11,[r5,#1] @ r11= T[1] 322 LDRB r10,[r5],r2 @ r10= T[0] T += step 340 LDRB r10,[r5,#1] @ r10= T[1] 342 LDRB r11,[r5],-r2 @ r11= T[0] T -= step 366 LDRB r11,[r5,#1] @ r11= T[1] 367 LDRB r10,[r5],r2 @ r10= T[0] T += ste [all...] |