| /external/llvm/test/CodeGen/AArch64/ |
| fp128.ll | 193 ; CHECK-NEXT: movz x0, #42
199 ; CHECK-NEXT: movz x0, #29
|
| func-calls.ll | 123 ; CHECK: movz x2, #42
|
| /external/llvm/lib/Target/Mips/ |
| MipsSubtarget.h | 81 // HasCondMov - Conditional mov (MOVZ, MOVN) instructions.
|
| /frameworks/native/opengl/libs/GLES2/ |
| gl2.cpp | 79 "movz %[fn], $ra, %[fn]\n\t" \
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64MCCodeEmitter.cpp | 443 // If one of the signed fixup kinds is applied to a MOVZ instruction, the
444 // eventual result could be either a MOVZ or a MOVN. It's the MCCodeEmitter's
|
| /external/chromium_org/third_party/openssl/openssl/crypto/modes/asm/ |
| ghash-x86_64.pl | 261 &movz ($nhi[0],&LB($dat));
276 &movz ($nhi[1],&LB($dat));
289 &movz ($rem[0],&LB($rem[0]));
308 &movz ($rem[0],&LB($Zlo));
|
| /external/chromium_org/third_party/openssl/openssl/crypto/rc4/asm/ |
| rc4-md5-x86_64.pl | 234 #rc4# movz $TX[0]#b,$TX[0]#d
274 #rc4# movz $TX[0]#b,$TX[0]#d
313 #rc4# movz $TX[0]#b,$TX[0]#d
352 #rc4# movz $TX[0]#b,$TX[0]#d
|
| /external/chromium_org/v8/src/mips/ |
| constants-mips.cc | 275 case MOVZ:
|
| /external/openssl/crypto/modes/asm/ |
| ghash-x86_64.pl | 261 &movz ($nhi[0],&LB($dat));
276 &movz ($nhi[1],&LB($dat));
289 &movz ($rem[0],&LB($rem[0]));
308 &movz ($rem[0],&LB($Zlo));
|
| /external/openssl/crypto/rc4/asm/ |
| rc4-md5-x86_64.pl | 234 #rc4# movz $TX[0]#b,$TX[0]#d
274 #rc4# movz $TX[0]#b,$TX[0]#d
313 #rc4# movz $TX[0]#b,$TX[0]#d
352 #rc4# movz $TX[0]#b,$TX[0]#d
|
| /external/v8/src/mips/ |
| constants-mips.cc | 271 case MOVZ:
|
| /frameworks/native/opengl/libs/EGL/ |
| getProcAddress.cpp | 76 "movz %[fn], $ra, %[fn]\n\t" \
|
| /frameworks/native/opengl/libs/GLES_CM/ |
| gl.cpp | 131 "movz %[fn], $ra, %[fn]\n\t" \
|
| /art/runtime/ |
| disassembler_mips.cc | 64 { kRTypeMask | (0x1f << 6), 10, "movz", "DST", },
|
| /external/chromium_org/third_party/openssl/openssl/crypto/perlasm/ |
| x86asm.pl | 68 sub ::movz { &movzx(@_); }
|
| /external/chromium_org/third_party/openssl/openssl/crypto/ |
| x86cpuid.pl | 66 &movz ("esi",&LB("ecx")); # number of cores - 1
|
| /external/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| RuntimeDyldELF.cpp | 335 // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
348 // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
360 // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
372 // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 107 // movz/movk instructions.
|
| AArch64ISelDAGToDAG.cpp | 73 /// appropriate shift operand to the MOVZ/MOVK instruction.
514 // tuning may change this to a sequence of MOVZ/MOVN/MOVK instructions.
|
| /external/llvm/test/CodeGen/X86/ |
| masked-iv-safe.ll | 3 ; RUN: not grep movz %t
|
| /external/openssl/crypto/perlasm/ |
| x86asm.pl | 68 sub ::movz { &movzx(@_); }
|
| /external/openssl/crypto/ |
| x86cpuid.pl | 66 &movz ("esi",&LB("ecx")); # number of cores - 1
|
| /external/llvm/test/MC/AArch64/ |
| basic-a64-diagnostics.s | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrCompiler.td | [all...] |
| /external/llvm/test/CodeGen/Mips/ |
| mips64-f128.ll | 636 ; CHECK: movz $[[R1]], $[[R3]], $1
637 ; CHECK: movz $[[R0]], $[[R2]], $1
|
