| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32r2_le.txt | 347 # CHECK: sdc1 $f9, 9158($7)
|
| /external/v8/src/mips/ |
| codegen-mips.cc | 202 __ sdc1(f0, MemOperand(t3));
|
| disasm-mips.cc | 916 case SDC1:
917 Format(instr, "sdc1 'ft, 'imm16s('rs)");
|
| deoptimizer-mips.cc | 782 __ sdc1(fpu_reg, MemOperand(sp, offset));
[all...] |
| code-stubs-mips.cc | [all...] |
| constants-mips.h | 298 SDC1 = ((7 << 3) + 5) << kOpcodeShift
|
| macro-assembler-mips.cc | 124 sdc1(reg, MemOperand(sp, i * kDoubleSize));
863 sdc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
878 sdc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
[all...] |
| stub-cache-mips.cc | [all...] |
| assembler-mips.h | 798 void sdc1(FPURegister fs, const MemOperand& dst);
[all...] |
| lithium-codegen-mips.cc | [all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.cc | 421 void MipsAssembler::Sdc1(DRegister ft, Register rs, uint16_t imm16) {
548 Sdc1(reg, base, offset);
[all...] |
| /external/chromium_org/v8/src/mips/ |
| disasm-mips.cc | 929 case SDC1:
930 Format(instr, "sdc1 'ft, 'imm16s('rs)");
|
| codegen-mips.cc | 280 __ sdc1(f0, MemOperand(t3));
|
| constants-mips.h | 301 SDC1 = ((7 << 3) + 5) << kOpcodeShift,
|
| macro-assembler-mips.cc | 125 sdc1(reg, MemOperand(sp, i * kDoubleSize));
863 sdc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
877 sdc1(FPURegister::from_code(i), MemOperand(sp, stack_offset));
[all...] |
| code-stubs-mips.cc | [all...] |
| lithium-codegen-mips.cc | 199 __ sdc1(DoubleRegister::FromAllocationIndex(save_iterator.Current()),
[all...] |
| stub-cache-mips.cc | 498 __ sdc1(f4, FieldMemOperand(storage_reg, HeapNumber::kValueOffset));
670 __ sdc1(f4, FieldMemOperand(scratch1, HeapNumber::kValueOffset));
[all...] |
| assembler-mips.h | 733 void sdc1(FPURegister fs, const MemOperand& dst);
[all...] |
| /art/compiler/dex/quick/mips/ |
| mips_lir.h | 388 kMipsFsdc1, // sdc1 t,o(b) [111101] b[25..21] t[20..16] o[15..0].
|
| assemble_mips.cc | 388 "sdc1", "!0S,!1d(!2r)", 4),
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| MipsLIR.h | 482 kMipsFsdc1, /* sdc1 t,o(b) [111101] b[25..21] t[20..16] o[15..0] */
|
| /system/core/libpixelflinger/codeflinger/ |
| mips_disassem.c | 76 /*56 */ "sc ", "swc1", "swc2", "swc3", "scd", "sdc1", "sdc2", "sd "
|
| /ndk/docs/text/ |
| CHANGES.text | 243 - Added -mldc1-sdc1 to MIPS GCC and Clang compilers. By default
245 ldc1/sdc1 to move them around. If your app use custom allocator
247 one does, your app may crashes due to ldc1/sdc1 on unaligned memory.
248 In this case you may use -mno-ldc1-sdc1 to workaround.
[all...] |
| /external/valgrind/main/VEX/priv/ |
| guest_mips_toIR.c | [all...] |
