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  /external/llvm/test/CodeGen/X86/
vec_loadsingles.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
vec_set-E.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
vec_set-G.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss
vec_set-I.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
vec_shuffle-19.ll 2 ; RUN: llc < %s -o /dev/null -march=x86 -mcpu=penryn -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 4
2008-06-13-VolatileLoadStore.ll 1 ; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | grep movsd | count 5
2 ; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | grep movl | count 2
constant-pool-remat-0.ll 4 ; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
13 ; RUN: llc < %s -march=x86 -mattr=+sse2 -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X32stat
extractelement-load.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=yonah | FileCheck %s
2 ; RUN: llc < %s -march=x86-64 -mattr=+sse2 -mcpu=core2 | FileCheck %s
pmovext.ll 16 tail call void @llvm.x86.sse2.storeu.dq(i8* %5, <16 x i8> %6) nounwind
22 declare void @llvm.x86.sse2.storeu.dq(i8*, <16 x i8>) nounwind
soft-fp.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -soft-float | not grep xmm
2 ; RUN: llc < %s -march=x86-64 -mattr=+sse2 -soft-float | not grep xmm
vec_call.ll 1 ; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
3 ; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
vec_insert.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movss | count 1
2 ; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | not grep pinsrw
vec_set-2.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss | count 1
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 1
vec_shuffle-23.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep punpck
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd
sincos.ll 2 ; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | FileCheck %s --check-prefix=SIN
3 ; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | FileCheck %s --check-prefix=COS
4 ; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 | FileCheck %s --check-prefix=SAFE
2006-05-17-VectorArg.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2
2007-06-29-VecFPConstantCSEBug.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2
2008-05-09-ShuffleLoweringBug.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2
2008-07-22-CombinerCrash.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2
  /external/chromium_org/third_party/qcms/
qcms.gyp 35 # For x86, turn off SSE2 for non-CrOS *nix Chrome builds.
55 'src/transform-sse2.c',
  /external/libvpx/libvpx/vp9/encoder/x86/
vp9_variance_sse2.c 357 DECLS(sse2, sse);
375 unsigned int sse2; \
379 h, &sse2); \
381 sse += sse2; \
386 h, &sse2); \
388 sse += sse2; \
392 h, &sse2); \
394 sse += sse2; \
416 FNS(sse2, sse);
436 DECLS(sse2, sse)
    [all...]
  /external/chromium_org/third_party/skia/gyp/
opts.gyp 5 # gcc lameness is that, in order to compile SSE2 intrinsics code, it
7 # emit SSE2 instructions even for scalar code, such as the CPUID
8 # test used to test for the presence of SSE2. So that, and all other
14 # SSE2, Linux x86_64 has SSE2 by definition, and MSC will happily emit
15 # SSE2 from instrinsics, while generating plain ol' 386 for everything
106 # to compile the SSE2 code with -mssse3 which would potentially allow
  /external/eigen/test/eigen2/
testsuite.cmake 21 # - EIGEN_EXPLICIT_VECTORIZATION: novec, SSE2, Altivec
22 # default: SSE2 for x86_64 systems, novec otherwise
47 # $COMMON-gcc-4.3.2,EIGEN_CXX=g++-4.3,EIGEN_EXPLICIT_VECTORIZATION=SSE2
182 if(EIGEN_EXPLICIT_VECTORIZATION MATCHES SSE2)
190 else(EIGEN_EXPLICIT_VECTORIZATION MATCHES SSE2)
191 message(FATAL_ERROR "Invalid value for EIGEN_EXPLICIT_VECTORIZATION (${EIGEN_EXPLICIT_VECTORIZATION}), must be: novec, SSE2, SSE3, Altivec")
192 endif(EIGEN_EXPLICIT_VECTORIZATION MATCHES SSE2)
  /external/skia/gyp/
opts.gyp 5 # gcc lameness is that, in order to compile SSE2 intrinsics code, it
7 # emit SSE2 instructions even for scalar code, such as the CPUID
8 # test used to test for the presence of SSE2. So that, and all other
14 # SSE2, Linux x86_64 has SSE2 by definition, and MSC will happily emit
15 # SSE2 from instrinsics, while generating plain ol' 386 for everything
106 # to compile the SSE2 code with -mssse3 which would potentially allow
  /external/llvm/test/Transforms/ScalarRepl/
2006-11-07-InvalidArrayPromote.ll 6 %tmp = call <4 x i32> @llvm.x86.sse2.cvttps2dq( <4 x float> %v0 ) ; <<4 x i32>> [#uses=2]
10 %tmp10 = call <4 x i32> @llvm.x86.sse2.cvttps2dq( <4 x float> %v1 ) ; <<4 x i32>> [#uses=2]
19 declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>)

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