| /external/llvm/test/CodeGen/X86/ |
| illegal-vector-args-return.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "mulpd %xmm3, %xmm1"
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "mulpd %xmm2, %xmm0"
3 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm3, %xmm1"
4 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm2, %xmm0"
|
| vec_shuffle-11.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin | not grep mov
5 %tmp131 = call <2 x i64> @llvm.x86.sse2.psrl.dq( <2 x i64> < i64 -1, i64 -1 >, i32 96 ) ; <<2 x i64>> [#uses=1]
11 declare <2 x i64> @llvm.x86.sse2.psrl.dq(<2 x i64>, i32)
|
| 2008-09-25-sseregparm-1.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movs | count 2
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fld | count 2
|
| vec_shift3.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllq
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psraw
3 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 2
7 %tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 %bits ) nounwind readnone ; <<2 x i64>> [#uses=1]
13 %tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 10 ) nounwind readnone ; <<2 x i64>> [#uses=1]
20 %tmp4 = tail call <8 x i16> @llvm.x86.sse2.psrai.w( <8 x i16> %tmp2, i32 %bits ) nounwind readnone ; <<8 x i16>> [#uses=1]
25 declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) nounwind readnone
26 declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) nounwind readnone
|
| viabs.ll | 1 ; RUN: llc < %s -march=x86-64 -mcpu=x86-64 | FileCheck %s -check-prefix=SSE2
6 ; SSE2-LABEL: test1:
7 ; SSE2: movdqa
8 ; SSE2: psrad $31
9 ; SSE2-NEXT: padd
10 ; SSE2-NEXT: pxor
11 ; SSE2-NEXT: ret
27 ; SSE2-LABEL: test2:
28 ; SSE2: movdqa
29 ; SSE2: psrad $3
[all...] |
| vec_shift.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllw
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psrlq
3 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psraw
9 %tmp9 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp8, <8 x i16> %tmp6 ) nounwind readnone ; <<8 x i16>> [#uses=1]
19 %tmp9 = tail call <8 x i16> @llvm.x86.sse2.psra.w( <8 x i16> %tmp2, <8 x i16> %tmp8 ) ; <<8 x i16>> [#uses=1]
24 declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) nounwind readnone
28 %tmp9 = tail call <2 x i64> @llvm.x86.sse2.psrl.q( <2 x i64> %b1, <2 x i64> %c ) nounwind readnone ; <<2 x i64>> [#uses=1]
32 declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) nounwind readnone
34 declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone
|
| vec_shift2.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep CPI
5 %tmp2 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp1, <8 x i16> bitcast (<4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > to <8 x i16>) ) nounwind readnone
12 %tmp2 = tail call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> %tmp1, <4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > ) nounwind readnone
16 declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) nounwind readnone
17 declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>) nounwind readnone
|
| 2007-06-28-X86-64-isel.ll | 1 ; RUN: llc < %s -march=x86-64 -mattr=+sse2
4 %tmp1 = call <8 x i16> @llvm.x86.sse2.pmins.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 7, i32 7, i32 7, i32 7 > to <8 x i16>) )
16 declare <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16>, <8 x i16>)
|
| mmx-insert-element.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep movq
2 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pshufd
|
| peep-vector-extract-concat.ll | 1 ; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse2,-sse41 | FileCheck %s
4 ; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse2,-sse41 | FileCheck %s -check-prefix=WIN64
|
| split-vector-bitcast.ll | 1 ; RUN: llc < %s -march=x86 -mattr=-sse2,+sse | grep addps
3 ; PR10497 + another isel issue with sse2 disabled
|
| volatile.ll | 1 ; RUN: llc < %s -march=x86 -mattr=sse2 | grep movsd | count 5
2 ; RUN: llc < %s -march=x86 -mattr=sse2 -O0 | grep -v esp | grep movsd | count 5
|
| 2008-10-16-VecUnaryOp.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2
|
| 2009-03-26-NoImplicitFPBug.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2
|
| 2009-06-05-ScalarToVectorByteMMX.ll | 1 ; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+mmx,+sse2 | FileCheck %s
|
| extractelement-from-arg.ll | 1 ; RUN: llc < %s -march=x86-64 -mattr=+sse2
|
| fastcc-2.ll | 1 ; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s
|
| fp-immediate-shorten.ll | 3 ; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | FileCheck %s
|
| negative_zero.ll | 1 ; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | FileCheck %s
|
| sfence.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep sfence
|
| shrink-fp-const1.ll | 1 ; RUN: llc < %s -march=x86-64 -mattr=+sse2 | not grep cvtss2sd
|
| /external/valgrind/main/none/tests/x86/ |
| insn_sse2.vgtest | 2 prereq: ../../../tests/x86_amd64_features x86-sse2
|
| /bionic/libc/arch-x86/ |
| x86.mk | 55 arch-x86/string/sse2-memset-atom.S \
56 arch-x86/string/sse2-bzero-atom.S \
57 arch-x86/string/sse2-memchr-atom.S \
58 arch-x86/string/sse2-memrchr-atom.S \
59 arch-x86/string/sse2-strchr-atom.S \
60 arch-x86/string/sse2-strrchr-atom.S \
61 arch-x86/string/sse2-index-atom.S \
62 arch-x86/string/sse2-strlen-atom.S \
63 arch-x86/string/sse2-strnlen-atom.S \
64 arch-x86/string/sse2-wcschr-atom.S
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| 2008-07-16-sse2_storel_dq.ll | 9 call void @llvm.x86.sse2.storel.dq( i8* bitcast (double* @G to i8*), <4 x i32> %0 ) nounwind
13 declare void @llvm.x86.sse2.storel.dq(i8*, <4 x i32>) nounwind
|
| /external/eigen/demos/mandelbrot/ |
| README | 7 Be sure to enable SSE2 or AltiVec to improve performance.
|
