| /prebuilts/gcc/linux-x86/x86/i686-linux-android-4.6/lib/gcc/i686-linux-android/4.6/include/ |
| tmmintrin.h | 34 /* We need definitions from the SSE3, SSE2 and SSE header files*/
|
| /prebuilts/gcc/linux-x86/x86/i686-linux-android-4.7/lib/gcc/i686-linux-android/4.7/include/ |
| fma4intrin.h | 35 /* We need definitions from the SSE4A, SSE3, SSE2 and SSE header files. */
|
| tmmintrin.h | 34 /* We need definitions from the SSE3, SSE2 and SSE header files*/
|
| /external/chromium_org/third_party/qcms/ |
| google.patch | 243 diff --git a/third_party/qcms/src/transform-sse2.c b/third_party/qcms/src/transform-sse2.c
245 --- a/third_party/qcms/src/transform-sse2.c
246 +++ b/third_party/qcms/src/transform-sse2.c
[all...] |
| qcms.target.darwin-x86.mk | 31 third_party/qcms/src/transform-sse2.c
|
| qcms.target.linux-x86.mk | 31 third_party/qcms/src/transform-sse2.c
|
| /external/v8/src/ia32/ |
| code-stubs-ia32.cc | 525 CpuFeatures::Scope scope(SSE2);
542 CpuFeatures::Scope scope(SSE2);
[all...] |
| /external/chromium_org/media/base/ |
| yuv_convert.cc | 169 // have SSE2, we can hack around this by making the selection here.
269 // after the end for SSE2 version.
|
| /external/chromium_org/third_party/skia/src/core/ |
| SkConvolver.cpp | 381 // SSE2 can access up to 3 extra pixels past the end of the
414 // Check if we need to avoid SSE2 for this row.
|
| /external/libvpx/libvpx/test/ |
| dct16x16_test.cc | 511 SSE2, Trans16x16DCT,
516 SSE2, Trans16x16HT,
|
| sad_test.cc | 493 INSTANTIATE_TEST_CASE_P(SSE2, SADTest, ::testing::ValuesIn(sse2_tests));
508 INSTANTIATE_TEST_CASE_P(SSE2, SADx4Test, ::testing::Values(
|
| dct32x32_test.cc | 254 SSE2, Trans32x32Test,
|
| /external/llvm/test/CodeGen/X86/ |
| pr3154.ll | 1 ; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mattr=+sse2
2 ; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mattr=+sse2 -relocation-model=pic -disable-fp-elim
|
| /external/llvm/test/Transforms/InstCombine/ |
| shufflemask-undef.ll | 92 call i32 @llvm.x86.sse2.pmovmskb.128( <16 x i8> %14 ) nounwind readnone ; <i32>:15 [#uses=1]
105 declare i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8>) nounwind readnone
|
| /external/skia/src/core/ |
| SkConvolver.cpp | 381 // SSE2 can access up to 3 extra pixels past the end of the
414 // Check if we need to avoid SSE2 for this row.
|
| /ndk/docs/text/ |
| CPU-ARCH-ABIS.text | 105 (Just like one typically does on x86 systems to check/use MMX/SSE2/etc...
138 documentation, plus the MMX, SSE, SSE2 and SSE3 instruction set
|
| /external/chromium/base/ |
| atomicops_internals_x86_gcc.h | 18 bool has_sse2; // Processor has SSE2.
|
| /external/chromium_org/base/ |
| atomicops_internals_tsan.h | 21 bool has_sse2; // Processor has SSE2.
|
| atomicops_internals_x86_gcc.h | 20 bool has_sse2; // Processor has SSE2.
|
| /external/chromium_org/skia/ext/ |
| convolver.h | 16 // We can build SSE2 optimized versions for all x86 CPUs
|
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/util/ |
| u_sse.h | 193 /* Provide an SSE2 implementation of _mm_mullo_epi32() in terms of
|
| /external/chromium_org/third_party/protobuf/src/google/protobuf/stubs/ |
| atomicops_internals_x86_gcc.h | 47 bool has_sse2; // Processor has SSE2.
|
| /external/chromium_org/third_party/skia/gyp/ |
| common_conditions.gypi | 98 'EnableEnhancedInstructionSet': '2',# /arch:SSE2
|
| /external/chromium_org/v8/src/ |
| atomicops_internals_x86_gcc.h | 43 bool has_sse2; // Processor has SSE2.
|
| /external/libvpx/libvpx/vp8/encoder/x86/ |
| quantize_sse2.c | 21 #include <emmintrin.h> /* SSE2 */
|
