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  /external/mesa3d/src/mesa/drivers/dri/nouveau/
nouveau_bufferobj.c 42 } else if (nbo->bo) {
43 nouveau_bo_map(nbo->bo, flags, context_client(ctx));
44 map = nbo->bo->map;
69 nouveau_bo_ref(NULL, &nbo->bo);
86 nouveau_bo_ref(NULL, &nbo->bo);
96 /* Get a hardware BO */
99 size, NULL, &nbo->bo);
nv10_state_fb.c 64 if (!nfb->hierz.bo || nfb->hierz.bo->size != size) {
70 nouveau_bo_ref(NULL, &nfb->hierz.bo);
72 &config, &nfb->hierz.bo);
78 nfb->hierz.bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
128 s->bo, 0, bo_flags);
141 s->bo, 0, bo_flags);
208 if (nfb->hierz.bo) {
nv04_surface.c 200 { src->bo, NOUVEAU_BO_RD | NOUVEAU_BO_VRAM | NOUVEAU_BO_GART },
201 { dst->bo, NOUVEAU_BO_WR | NOUVEAU_BO_VRAM },
239 PUSH_RELOC(push, dst->bo, dst->offset, NOUVEAU_BO_LOW, 0, 0);
242 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
261 PUSH_RELOC(push, src->bo, src->offset + (y + sy) * src->pitch +
281 { src->bo, NOUVEAU_BO_RD | NOUVEAU_BO_VRAM | NOUVEAU_BO_GART },
282 { dst->bo, NOUVEAU_BO_WR | NOUVEAU_BO_VRAM | NOUVEAU_BO_GART },
298 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
299 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
301 PUSH_RELOC(push, src->bo, src->offset, NOUVEAU_BO_LOW, 0, 0)
    [all...]
  /external/mesa3d/src/mesa/drivers/dri/radeon/
radeon_tex_copy.c 78 assert(rrb->bo);
80 assert(timg->mt->bo);
93 fprintf(stderr, "src size %d, dst size %d\n", rrb->bo->size, timg->mt->bo->size);
128 return radeon->vtbl.blit(ctx, rrb->bo, src_offset, src_mesaformat, rrb->pitch/rrb->cpp,
130 timg->mt->bo, dst_offset, dst_mesaformat,
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv30/
nv30_transfer.h 5 struct nouveau_bo *bo; member in struct:nv30_rect
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeonsi/
radeonsi_shader.h 76 struct si_resource *bo; member in struct:si_pipe_shader
radeonsi_pm4.h 53 /* BO's referenced by this state */
55 struct si_resource *bo[SI_PM4_MAX_BO]; member in struct:si_pm4_state
69 struct si_resource *bo,
  /external/mesa3d/src/gallium/drivers/nv30/
nv30_transfer.h 5 struct nouveau_bo *bo; member in struct:nv30_rect
  /external/mesa3d/src/gallium/drivers/radeonsi/
radeonsi_shader.h 76 struct si_resource *bo; member in struct:si_pipe_shader
radeonsi_pm4.h 53 /* BO's referenced by this state */
55 struct si_resource *bo[SI_PM4_MAX_BO]; member in struct:si_pm4_state
69 struct si_resource *bo,
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/
nv50_transfer.c 24 rect->bo = mt->base.bo;
69 nouveau_bufctx_refn(bctx, 0, src->bo, src->domain | NOUVEAU_BO_RD);
70 nouveau_bufctx_refn(bctx, 0, dst->bo, dst->domain | NOUVEAU_BO_WR);
74 if (nouveau_bo_memtype(src->bo)) {
91 if (nouveau_bo_memtype(dst->bo)) {
112 PUSH_DATAh(push, src->bo->offset + src_ofst);
113 PUSH_DATAh(push, dst->bo->offset + dst_ofst);
116 PUSH_DATA (push, src->bo->offset + src_ofst);
117 PUSH_DATA (push, dst->bo->offset + dst_ofst)
    [all...]
  /external/mesa3d/src/gallium/drivers/nv50/
nv50_transfer.c 24 rect->bo = mt->base.bo;
69 nouveau_bufctx_refn(bctx, 0, src->bo, src->domain | NOUVEAU_BO_RD);
70 nouveau_bufctx_refn(bctx, 0, dst->bo, dst->domain | NOUVEAU_BO_WR);
74 if (nouveau_bo_memtype(src->bo)) {
91 if (nouveau_bo_memtype(dst->bo)) {
112 PUSH_DATAh(push, src->bo->offset + src_ofst);
113 PUSH_DATAh(push, dst->bo->offset + dst_ofst);
116 PUSH_DATA (push, src->bo->offset + src_ofst);
117 PUSH_DATA (push, dst->bo->offset + dst_ofst)
    [all...]
  /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/intel/
intel_regions.c 115 /* We have the region->map_refcount controlling mapping of the BO because
127 if (drm_intel_bo_busy(region->bo)) {
128 perf_debug("Mapping a busy BO, causing a stall on the GPU.\n");
137 drm_intel_gem_bo_map_gtt(region->bo);
139 drm_intel_bo_map(region->bo, true);
141 region->map = region->bo->virtual;
157 drm_intel_gem_bo_unmap_gtt(region->bo);
159 drm_intel_bo_unmap(region->bo);
184 region->bo = buffer;
226 if (drm_intel_bo_flink(region->bo, &region->name)
    [all...]
  /external/mesa3d/src/mesa/drivers/dri/intel/
intel_regions.c 115 /* We have the region->map_refcount controlling mapping of the BO because
127 if (drm_intel_bo_busy(region->bo)) {
128 perf_debug("Mapping a busy BO, causing a stall on the GPU.\n");
137 drm_intel_gem_bo_map_gtt(region->bo);
139 drm_intel_bo_map(region->bo, true);
141 region->map = region->bo->virtual;
157 drm_intel_gem_bo_unmap_gtt(region->bo);
159 drm_intel_bo_unmap(region->bo);
184 region->bo = buffer;
226 if (drm_intel_bo_flink(region->bo, &region->name)
    [all...]
  /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
gen7_wm_surface_state.c 127 assert ((mcs_mt->region->bo->offset & 0xfff) == 0);
130 surf->ss6.mcs_enabled.mcs_base_address = mcs_mt->region->bo->offset >> 12;
131 drm_intel_bo_emit_reloc(brw->intel.batch.bo,
134 mcs_mt->region->bo,
242 drm_intel_bo *bo = intel_obj ? intel_obj->buffer : NULL; local
260 if (bo) {
261 surf->ss1.base_addr = bo->offset; /* reloc */
267 drm_intel_bo_emit_reloc(brw->intel.batch.bo,
270 bo, 0,
352 intelObj->mt->region->bo->offset + intelObj->mt->offset; /* reloc *
    [all...]
  /external/mesa3d/src/mesa/drivers/dri/i965/
gen7_wm_surface_state.c 127 assert ((mcs_mt->region->bo->offset & 0xfff) == 0);
130 surf->ss6.mcs_enabled.mcs_base_address = mcs_mt->region->bo->offset >> 12;
131 drm_intel_bo_emit_reloc(brw->intel.batch.bo,
134 mcs_mt->region->bo,
242 drm_intel_bo *bo = intel_obj ? intel_obj->buffer : NULL; local
260 if (bo) {
261 surf->ss1.base_addr = bo->offset; /* reloc */
267 drm_intel_bo_emit_reloc(brw->intel.batch.bo,
270 bo, 0,
352 intelObj->mt->region->bo->offset + intelObj->mt->offset; /* reloc *
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nouveau/
nouveau_mm.c 37 struct nouveau_bo *bo; member in struct:mm_slab
99 /* size of bo allocation for slab with chunks of (1 << chunk_order) bytes */
129 slab->bo = NULL;
132 &slab->bo);
155 /* @return token to identify slab or NULL if we just allocated a new bo */
158 uint32_t size, struct nouveau_bo **bo, uint32_t *offset)
168 bo);
195 nouveau_bo_ref(slab->bo, bo);
266 nouveau_bo_ref(NULL, &slab->bo);
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gbm/backends/dri/
gbm_driint.h 94 gbm_dri_bo(struct gbm_bo *bo)
96 return (struct gbm_dri_bo *) bo;
  /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/nouveau/
nv10_state_fb.c 64 if (!nfb->hierz.bo || nfb->hierz.bo->size != size) {
70 nouveau_bo_ref(NULL, &nfb->hierz.bo);
72 &config, &nfb->hierz.bo);
78 nfb->hierz.bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
128 s->bo, 0, bo_flags);
141 s->bo, 0, bo_flags);
208 if (nfb->hierz.bo) {
nv04_surface.c 200 { src->bo, NOUVEAU_BO_RD | NOUVEAU_BO_VRAM | NOUVEAU_BO_GART },
201 { dst->bo, NOUVEAU_BO_WR | NOUVEAU_BO_VRAM },
239 PUSH_RELOC(push, dst->bo, dst->offset, NOUVEAU_BO_LOW, 0, 0);
242 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
261 PUSH_RELOC(push, src->bo, src->offset + (y + sy) * src->pitch +
281 { src->bo, NOUVEAU_BO_RD | NOUVEAU_BO_VRAM | NOUVEAU_BO_GART },
282 { dst->bo, NOUVEAU_BO_WR | NOUVEAU_BO_VRAM | NOUVEAU_BO_GART },
298 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
299 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
301 PUSH_RELOC(push, src->bo, src->offset, NOUVEAU_BO_LOW, 0, 0)
    [all...]
  /external/mesa3d/src/gallium/drivers/nouveau/
nouveau_mm.c 37 struct nouveau_bo *bo; member in struct:mm_slab
99 /* size of bo allocation for slab with chunks of (1 << chunk_order) bytes */
129 slab->bo = NULL;
132 &slab->bo);
155 /* @return token to identify slab or NULL if we just allocated a new bo */
158 uint32_t size, struct nouveau_bo **bo, uint32_t *offset)
168 bo);
195 nouveau_bo_ref(slab->bo, bo);
266 nouveau_bo_ref(NULL, &slab->bo);
    [all...]
  /external/mesa3d/src/gbm/backends/dri/
gbm_driint.h 94 gbm_dri_bo(struct gbm_bo *bo)
96 return (struct gbm_dri_bo *) bo;
  /external/chromium_org/third_party/mesa/src/src/gallium/winsys/radeon/drm/
radeon_drm_cs.c 210 int radeon_get_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo)
214 unsigned hash = bo->handle & (sizeof(csc->is_handle_added)-1);
219 if (reloc->handle == bo->handle) {
223 /* Hash collision, look for the BO in the list of relocs linearly. */
227 if (reloc->handle == bo->handle) {
238 /*printf("write_reloc collision, hash: %i, handle: %i\n", hash, bo->handle);*/
248 struct radeon_bo *bo,
255 unsigned hash = bo->handle & (sizeof(csc->is_handle_added)-1);
262 if (reloc->handle == bo->handle) {
267 /* Hash collision, look for the BO in the list of relocs linearly. *
320 struct radeon_bo *bo = (struct radeon_bo*)buf; local
383 struct radeon_bo *bo = (struct radeon_bo*)buf; local
538 struct radeon_bo *bo = (struct radeon_bo*)_buf; local
    [all...]
  /external/chromium_org/third_party/skia/src/images/
SkJpegUtility.cpp 25 size_t bo = (size_t) byte_offset; local
27 if (bo > src->current_offset) {
28 (void)src->fStream->skip(bo - src->current_offset);
31 (void)src->fStream->skip(bo);
34 src->current_offset = bo;
  /external/mesa3d/src/gallium/winsys/radeon/drm/
radeon_drm_cs.c 210 int radeon_get_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo)
214 unsigned hash = bo->handle & (sizeof(csc->is_handle_added)-1);
219 if (reloc->handle == bo->handle) {
223 /* Hash collision, look for the BO in the list of relocs linearly. */
227 if (reloc->handle == bo->handle) {
238 /*printf("write_reloc collision, hash: %i, handle: %i\n", hash, bo->handle);*/
248 struct radeon_bo *bo,
255 unsigned hash = bo->handle & (sizeof(csc->is_handle_added)-1);
262 if (reloc->handle == bo->handle) {
267 /* Hash collision, look for the BO in the list of relocs linearly. *
320 struct radeon_bo *bo = (struct radeon_bo*)buf; local
383 struct radeon_bo *bo = (struct radeon_bo*)buf; local
538 struct radeon_bo *bo = (struct radeon_bo*)_buf; local
    [all...]

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1 2 3 45 6 7 8 91011>>