| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| Rop.java | 52 /** the opcode; one of the constants in {@link RegOps} */
53 private final int opcode; field in class:Rop
83 * @param opcode the opcode; one of the constants in {@link RegOps}
94 public Rop(int opcode, Type result, TypeList sources,
118 this.opcode = opcode;
131 * @param opcode the opcode; one of the constants in {@link RegOps}
141 public Rop(int opcode, Type result, TypeList sources
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_opcodes.h | 243 rc_opcode Opcode;
269 static inline const struct rc_opcode_info * rc_get_opcode_info(rc_opcode opcode)
271 assert((unsigned int)opcode < MAX_RC_OPCODE);
272 assert(rc_opcodes[opcode].Opcode == opcode);
274 return &rc_opcodes[opcode];
|
| /external/mesa3d/src/mesa/program/ |
| prog_instruction.c | 144 gl_inst_opcode Opcode;
152 * \note Opcode should equal array index!
254 * Return the number of src registers for the given instruction/opcode.
257 _mesa_num_inst_src_regs(gl_inst_opcode opcode)
259 ASSERT(opcode < MAX_OPCODE);
260 ASSERT(opcode == InstInfo[opcode].Opcode);
261 ASSERT(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode);
262 return InstInfo[opcode].NumSrcRegs
[all...] |
| /external/open-vcdiff/src/ |
| codetable_test.cc | 44 int opcode) {
45 g_exercise_code_table_->inst1[opcode] = inst1;
46 g_exercise_code_table_->mode1[opcode] = mode1;
47 g_exercise_code_table_->size1[opcode] = (inst1 == VCD_NOOP) ? 0 : size1;
48 g_exercise_code_table_->inst2[opcode] = inst2;
49 g_exercise_code_table_->mode2[opcode] = mode2;
50 g_exercise_code_table_->size2[opcode] = (inst2 == VCD_NOOP) ? 0 : size2;
55 int opcode = 0; local
74 AddExerciseOpcode(inst1, mode1, 0, inst2, mode2, 0, opcode++);
75 AddExerciseOpcode(inst1, mode1, 0, inst2, mode2, 255, opcode++)
[all...] |
| /external/proguard/src/proguard/classfile/attribute/visitor/ |
| StackSizeComputer.java | 165 byte opcode = simpleInstruction.opcode;
169 opcode == InstructionConstants.OP_IRETURN ||
170 opcode == InstructionConstants.OP_LRETURN ||
171 opcode == InstructionConstants.OP_FRETURN ||
172 opcode == InstructionConstants.OP_DRETURN ||
173 opcode == InstructionConstants.OP_ARETURN ||
174 opcode == InstructionConstants.OP_RETURN ||
175 opcode == InstructionConstants.OP_ATHROW;
186 byte opcode = variableInstruction.opcode
[all...] |
| /external/smali/dexlib/src/main/java/org/jf/dexlib/Code/ |
| InstructionIterator.java | 48 Opcode opcode = Opcode.getOpcodeByValue(opcodeValue); local
52 if (opcode == null) {
53 System.err.println(String.format("unknown opcode encountered - %x. Treating as nop.",
57 if (opcode == Opcode.NOP) {
62 instruction = new Instruction10x(Opcode.NOP, insns, insnsPosition);
82 instruction = opcode.format.Factory.makeInstruction(dexFile, opcode, insns, insnsPosition)
[all...] |
| /art/runtime/ |
| dex_instruction.cc | 58 #define INSTRUCTION_SIZE(opcode, c, p, format, r, i, a, v) \
59 ((opcode == NOP) ? -1 : \
86 switch (FormatOf(Opcode())) {
95 switch (FormatOf(Opcode())) {
109 switch (FormatOf(Opcode())) {
133 switch (FormatOf(Opcode())) {
144 switch (FormatOf(Opcode())) {
160 switch (FormatOf(Opcode())) {
186 switch (FormatOf(Opcode())) {
203 Code opcode = static_cast<Code>(insn & 0xFF) local
210 Code opcode = static_cast<Code>(insn & 0xFF); local
388 const char* opcode = kInstructionNames[Opcode()]; local
390 case k10x: os << opcode; break; local
556 os << opcode << " {"; local
569 os << opcode << " {"; local
[all...] |
| /dalvik/dx/src/com/android/dx/cf/direct/ |
| CodeObserver.java | 65 public void visitInvalid(int opcode, int offset, int length) {
70 public void visitNoArgs(int opcode, int offset, int length, Type type) {
75 public void visitLocal(int opcode, int offset, int length,
81 if (opcode == ByteOps.IINC) {
97 public void visitConstant(int opcode, int offset, int length,
101 visitNoArgs(opcode, offset, length, null);
106 visitLiteralInt(opcode, offset, length, value);
111 visitLiteralLong(opcode, offset, length,
117 visitLiteralFloat(opcode, offset, length,
123 visitLiteralDouble(opcode, offset, length
206 int opcode = bytes.getUnsignedByte(offset); local
[all...] |
| /dalvik/vm/mterp/armv5te/ |
| OP_CMP_LONG.S | 35 blt .L${opcode}_less @ signed compare on high part
36 bgt .L${opcode}_greater
38 bhi .L${opcode}_greater @ unsigned compare on low part
39 bne .L${opcode}_less
40 b .L${opcode}_finish @ equal; r1 already holds 0
43 .L${opcode}_less:
49 GET_INST_OPCODE(ip) @ extract opcode from rINST
52 .L${opcode}_greater:
56 .L${opcode}_finish:
59 GET_INST_OPCODE(ip) @ extract opcode from rINS
[all...] |
| /dalvik/vm/mterp/mips/ |
| OP_INVOKE_OBJECT_INIT_RANGE.S | 16 beqz a2, .L${opcode}_finish # no, go
18 .L${opcode}_setFinal:
25 .L${opcode}_finish:
28 bnez a1, .L${opcode}_debugger # Yes - skip optimization
30 GET_INST_OPCODE(t0) # t0<- opcode from rINST
41 .L${opcode}_debugger:
|
| unflopWider.S | 23 .L${opcode}_set_vreg:
28 .L${opcode}_set_vreg:
31 GET_INST_OPCODE(t0) # extract opcode from rINST
|
| unopNarrower.S | 9 * long-to-float opcode.
27 .L${opcode}_set_vreg:
32 .L${opcode}_set_vreg_f:
35 GET_INST_OPCODE(t0) # extract opcode from rINST
|
| /dalvik/vm/mterp/x86/ |
| OP_INVOKE_OBJECT_INIT_RANGE.S | 17 jnz .L${opcode}_setFinal # yes, go
18 .L${opcode}_finish:
22 jnz .L${opcode}_debugger # Yes - skip optimization
29 .L${opcode}_setFinal:
37 jmp .L${opcode}_finish
46 .L${opcode}_debugger:
|
| OP_NEW_INSTANCE.S | 25 je .L${opcode}_resolve # no, go do it
26 .L${opcode}_resolved: # on entry, ecx<- class
28 jne .L${opcode}_needinit
29 .L${opcode}_initialized: # on entry, ecx<- class
43 jne .L${opcode}_jitCheck
45 .L${opcode}_end:
58 .L${opcode}_jitCheck:
60 jne .L${opcode}_end # yes, finish
80 .L${opcode}_needinit:
86 jne .L${opcode}_initialized # success, continu
[all...] |
| bindiv.S | 16 jne .L${opcode}_continue_div
18 jne .L${opcode}_continue_div
26 .L${opcode}_continue_div:
|
| bindiv2addr.S | 16 jne .L${opcode}_continue_div2addr
18 jne .L${opcode}_continue_div2addr
26 .L${opcode}_continue_div2addr:
|
| bindivLit16.S | 17 jne .L${opcode}_continue_div
19 jne .L${opcode}_continue_div
27 .L${opcode}_continue_div:
|
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| PlainInsn.java | 34 * @param opcode {@code non-null;} the opcode
39 public PlainInsn(Rop opcode, SourcePosition position,
41 super(opcode, position, result, sources);
43 switch (opcode.getBranchingness()) {
50 if (result != null && opcode.getBranchingness() != Rop.BRANCH_NONE) {
60 * @param opcode {@code non-null;} the opcode
65 public PlainInsn(Rop opcode, SourcePosition position, RegisterSpec result,
67 this(opcode, position, result, RegisterSpecList.make(source))
[all...] |
| CstInsn.java | 32 * @param opcode {@code non-null;} the opcode
38 public CstInsn(Rop opcode, SourcePosition position, RegisterSpec result,
40 super(opcode, position, result, sources);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/rbug/ |
| rbug_connection.c | 35 enum rbug_opcode opcode; member in struct:rbug_connection
90 data->opcode = 0;
134 rbug_connection_send_start(struct rbug_connection *c, enum rbug_opcode opcode, uint32_t length)
136 c->opcode = opcode;
160 if (c->opcode < 0)
|
| /external/mesa3d/src/gallium/auxiliary/rbug/ |
| rbug_connection.c | 35 enum rbug_opcode opcode; member in struct:rbug_connection
90 data->opcode = 0;
134 rbug_connection_send_start(struct rbug_connection *c, enum rbug_opcode opcode, uint32_t length)
136 c->opcode = opcode;
160 if (c->opcode < 0)
|
| /dalvik/dx/src/com/android/dx/io/instructions/ |
| OneRegisterDecodedInstruction.java | 31 public OneRegisterDecodedInstruction(InstructionCodec format, int opcode,
34 super(format, opcode, index, indexType, target, literal);
|
| RegisterRangeDecodedInstruction.java | 35 public RegisterRangeDecodedInstruction(InstructionCodec format, int opcode,
38 super(format, opcode, index, indexType, target, literal);
|
| TwoRegisterDecodedInstruction.java | 34 public TwoRegisterDecodedInstruction(InstructionCodec format, int opcode,
37 super(format, opcode, index, indexType, target, literal);
|
| /dalvik/dx/src/com/android/dx/rop/code/ |
| CstInsn.java | 32 * @param opcode {@code non-null;} the opcode
38 public CstInsn(Rop opcode, SourcePosition position, RegisterSpec result,
40 super(opcode, position, result, sources);
|
