| /external/v8/src/mips/ |
| simulator-mips.cc | [all...] |
| assembler-mips.cc | 1522 void Assembler::teq(Register rs, Register rt, uint16_t code) { function in class:v8::Assembler
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/api/ |
| armCOMM_IDCT_s.h | 293 TEQ xi0, #0
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/api/ |
| armCOMM_IDCT_s.h | 293 TEQ xi0, #0
[all...] |
| /art/compiler/utils/arm/ |
| assembler_arm.cc | 331 void ArmAssembler::teq(Register rn, ShifterOperand so, Condition cond) { function in class:art::arm::ArmAssembler
332 CHECK_NE(rn, PC); // Reserve teq pc instruction for exception handler marker.
333 EmitType01(cond, so.type(), TEQ, 1, rn, R0, so);
[all...] |
| /external/chromium_org/v8/src/mips/ |
| assembler-mips.cc | 1529 void Assembler::teq(Register rs, Register rt, uint16_t code) { function in class:v8::Assembler
[all...] |
| /external/chromium_org/v8/src/arm/ |
| assembler-arm.cc | 1349 void Assembler::teq(Register src1, const Operand& src2, Condition cond) { function in class:v8::internal::Assembler
[all...] |
| simulator-arm.cc | [all...] |
| /external/v8/src/arm/ |
| assembler-arm.cc | [all...] |
| simulator-arm.cc | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 779 // Insert instruction "teq $divisor_reg, $zero, 7".
782 MIB = BuildMI(MBB, llvm::next(I), MI->getDebugLoc(), TII.get(Mips::TEQ))
[all...] |
| /external/llvm/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /external/valgrind/main/none/tests/arm/ |
| v6intThumb.stdout.exp | [all...] |
