/external/llvm/lib/Target/Hexagon/ |
HexagonPeephole.cpp | 137 if (!DisableOptSZExt && MI->getOpcode() == Hexagon::SXTW) { 156 MI->getOpcode () == Hexagon::COMBINE_Ir_V4) { 173 if (MI->getOpcode() == Hexagon::LSRd_ri) { 188 (MI->getOpcode() == Hexagon::NOT_p)) { 258 int NewOp = QII->getInvertedPredicatedOpcode(MI->getOpcode()); 268 unsigned Op = MI->getOpcode();
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HexagonISelDAGToDAG.cpp | 391 if (Const32->getOpcode() == HexagonISD::CONST32 && 773 if ((Const32->getOpcode() == HexagonISD::CONST32) && 776 if (Base.getOpcode() == ISD::TargetGlobalAddress) { 850 if (MulOp0.getOpcode() == ISD::SIGN_EXTEND) { 857 } else if (MulOp0.getOpcode() == ISD::LOAD) { [all...] |
HexagonCopyToCombine.cpp | 117 switch(MI->getOpcode()) { 162 return I->getOpcode() == Hexagon::TFRI && 166 return I->getOpcode() == Hexagon::TFRI && 175 assert((HighRegInst->getOpcode() == Hexagon::TFR || 176 HighRegInst->getOpcode() == Hexagon::TFRI || 177 HighRegInst->getOpcode() == Hexagon::TFRI_V4) && 178 (LowRegInst->getOpcode() == Hexagon::TFR || 179 LowRegInst->getOpcode() == Hexagon::TFRI || 180 LowRegInst->getOpcode() == Hexagon::TFRI_V4) && 191 return HighRegInst->getOpcode() == LowRegInst->getOpcode() & [all...] |
HexagonInstrInfo.cpp | 74 switch (MI->getOpcode()) { 99 switch (MI->getOpcode()) { 211 if (AllowModify && I->getOpcode() == Hexagon::JMP && 240 int LastOpcode = LastInst->getOpcode(); 268 int SecLastOpcode = SecondLastInst->getOpcode(); 313 if (I->getOpcode() != BOpc && I->getOpcode() != BccOpc && 314 I->getOpcode() != BccOpcNot) 324 if (I->getOpcode() != BccOpc && I->getOpcode() != BccOpcNot [all...] |
/external/llvm/lib/Transforms/Utils/ |
IntegerDivision.cpp | 335 assert((Rem->getOpcode() == Instruction::SRem || 336 Rem->getOpcode() == Instruction::URem) && 342 if (Rem->getOpcode() == Instruction::SRem) { 352 if (!BO || BO->getOpcode() != Instruction::URem) 368 assert(UDiv->getOpcode() == Instruction::UDiv && "Non-udiv in expansion?"); 385 assert((Div->getOpcode() == Instruction::SDiv || 386 Div->getOpcode() == Instruction::UDiv) && 395 if (Div->getOpcode() == Instruction::SDiv) { 405 if (!BO || BO->getOpcode() != Instruction::UDiv) 430 assert((Rem->getOpcode() == Instruction::SRem | [all...] |
/external/llvm/include/llvm/IR/ |
InstrTypes.h | 116 return I->getOpcode() == Instruction::Alloca || 117 I->getOpcode() == Instruction::Load || 118 I->getOpcode() == Instruction::VAArg || 119 I->getOpcode() == Instruction::ExtractValue || 120 (I->getOpcode() >= CastOpsBegin && I->getOpcode() < CastOpsEnd); 326 BinaryOps getOpcode() const { 327 return static_cast<BinaryOps>(Instruction::getOpcode()); 603 Instruction::CastOps getOpcode() const { 604 return Instruction::CastOps(Instruction::getOpcode()); [all...] |
/external/llvm/lib/Analysis/ |
PHITransAddr.cpp | 34 if (Inst->getOpcode() == Instruction::Add && 200 return AddAsInput(ConstantExpr::getCast(Cast->getOpcode(), 208 if (CastI->getOpcode() == Cast->getOpcode() && 262 if (Inst->getOpcode() == Instruction::Add && 274 if (BOp->getOpcode() == Instruction::Add) 303 if (BO->getOpcode() == Instruction::Add && 391 CastInst *New = CastInst::Create(Cast->getOpcode(), 425 if (Inst->getOpcode() == Instruction::Add &&
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/dalvik/dx/src/com/android/dx/io/instructions/ |
InstructionCodec.java | 109 out.write(codeUnit(insn.getOpcode(), insn.getA())); 126 out.write(codeUnit(insn.getOpcode(), relativeTarget)); 162 codeUnit(insn.getOpcode(), insn.getLiteralByte()), 181 codeUnit(insn.getOpcode(), insn.getA()), 201 out.write(codeUnit(insn.getOpcode(), insn.getA()), relativeTarget); 219 codeUnit(insn.getOpcode(), insn.getA()), 246 int opcode = insn.getOpcode(); 269 codeUnit(insn.getOpcode(), insn.getA()), 290 codeUnit(insn.getOpcode(), insn.getA()), 311 codeUnit(insn.getOpcode(), insn.getA()) [all...] |
/external/dexmaker/src/dx/java/com/android/dx/io/instructions/ |
InstructionCodec.java | 110 out.write(codeUnit(insn.getOpcode(), insn.getA())); 127 out.write(codeUnit(insn.getOpcode(), relativeTarget)); 163 codeUnit(insn.getOpcode(), insn.getLiteralByte()), 182 codeUnit(insn.getOpcode(), insn.getA()), 202 out.write(codeUnit(insn.getOpcode(), insn.getA()), relativeTarget); 220 codeUnit(insn.getOpcode(), insn.getA()), 247 int opcode = insn.getOpcode(); 270 codeUnit(insn.getOpcode(), insn.getA()), 291 codeUnit(insn.getOpcode(), insn.getA()), 312 codeUnit(insn.getOpcode(), insn.getA()) [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelDAGToDAG.cpp | 171 if (Addr.getOpcode() == SystemZISD::PCREL_WRAPPER) { 383 unsigned Opcode = N.getOpcode(); 386 Opcode = N.getOpcode(); 392 unsigned Op0Code = Op0->getOpcode(); 393 unsigned Op1Code = Op1->getOpcode(); 441 if (Base->getOpcode() == ISD::FrameIndex) 470 unsigned IndexOpcode = Index->getOpcode(); 492 if (Addr.getOpcode() == ISD::Constant && 538 else if (Base.getOpcode() == ISD::FrameIndex) { 594 if (Op.getOpcode() != ISD::AND [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
InstCombineSelect.cpp | 85 switch (I->getOpcode()) { 105 switch (I->getOpcode()) { 146 return CastInst::Create(Instruction::CastOps(TI->getOpcode()), NewSI, 189 return BinaryOperator::Create(BO->getOpcode(), MatchOp, NewSI); 191 return BinaryOperator::Create(BO->getOpcode(), NewSI, MatchOp); 235 BinaryOperator *BO = BinaryOperator::Create(TVI_BO->getOpcode(), 270 BinaryOperator *BO = BinaryOperator::Create(FVI_BO->getOpcode(), 304 return SimplifyBinOp(B->getOpcode(), RepOp, B->getOperand(1), TD, TLI); 306 return SimplifyBinOp(B->getOpcode(), B->getOperand(0), RepOp, TD, TLI); 345 return ConstantFoldInstOperands(I->getOpcode(), I->getType() [all...] |
/dalvik/dx/src/com/android/dx/rop/code/ |
Insn.java | 124 public final Rop getOpcode() { 157 if (opcode.getOpcode() == RegOps.MARK_LOCAL) { 187 * is just a convenient wrapper for {@code getOpcode().canThrow()}. 279 return opcode == b.getOpcode()
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BasicBlock.java | 79 Rop one = insns.get(i).getOpcode(); 87 if (lastInsn.getOpcode().getBranchingness() == Rop.BRANCH_NONE) {
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
R600MCCodeEmitter.cpp | 152 if (isTexOp(MI.getOpcode())) { 154 } else if (isFCOp(MI.getOpcode())){ 156 } else if (MI.getOpcode() == AMDGPU::RETURN || 157 MI.getOpcode() == AMDGPU::BUNDLE || 158 MI.getOpcode() == AMDGPU::KILL) { 161 switch(MI.getOpcode()) { 195 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode()); 204 if(MI.getOpcode() == AMDGPU::PRED_X) 333 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode()); 397 unsigned opcode = MI.getOpcode(); [all...] |
/external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
Insn.java | 124 public final Rop getOpcode() { 157 if (opcode.getOpcode() == RegOps.MARK_LOCAL) { 187 * is just a convenient wrapper for {@code getOpcode().canThrow()}. 279 return opcode == b.getOpcode()
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BasicBlock.java | 79 Rop one = insns.get(i).getOpcode(); 87 if (lastInsn.getOpcode().getBranchingness() == Rop.BRANCH_NONE) {
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/external/llvm/lib/Target/Mips/ |
MipsSEISelDAGToDAG.cpp | 74 if ((MI.getOpcode() == Mips::ADDiu) && 79 } else if ((MI.getOpcode() == Mips::DADDiu) && 207 if (I->getOpcode() == Mips::RDDSP) 209 else if (I->getOpcode() == Mips::WRDSP) 219 unsigned Opc = InFlag.getOpcode(); (void)Opc; 250 if (Addr.getOpcode() == MipsISD::Wrapper) { 257 if ((Addr.getOpcode() == ISD::TargetExternalSymbol || 258 Addr.getOpcode() == ISD::TargetGlobalAddress)) 280 if (Addr.getOpcode() == ISD::ADD) { 289 if (Addr.getOperand(1).getOpcode() == MipsISD::Lo | [all...] |
/external/llvm/lib/Target/R600/ |
AMDGPUInstrInfo.cpp | 89 switch (iter->getOpcode()) { 219 return get(MI.getOpcode()).TSFlags & AMDGPU_FLAG_REGISTER_STORE; 223 return get(MI.getOpcode()).TSFlags & AMDGPU_FLAG_REGISTER_LOAD;
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
R600MCCodeEmitter.cpp | 152 if (isTexOp(MI.getOpcode())) { 154 } else if (isFCOp(MI.getOpcode())){ 156 } else if (MI.getOpcode() == AMDGPU::RETURN || 157 MI.getOpcode() == AMDGPU::BUNDLE || 158 MI.getOpcode() == AMDGPU::KILL) { 161 switch(MI.getOpcode()) { 195 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode()); 204 if(MI.getOpcode() == AMDGPU::PRED_X) 333 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode()); 397 unsigned opcode = MI.getOpcode(); [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430FrameLowering.cpp | 82 while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r)) 114 unsigned RetOpcode = MBBI->getOpcode(); 142 unsigned Opc = PI->getOpcode(); 246 if (Old->getOpcode() == TII.getCallFrameSetupOpcode()) { 251 assert(Old->getOpcode() == TII.getCallFrameDestroyOpcode()); 269 } else if (I->getOpcode() == TII.getCallFrameDestroyOpcode()) {
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/external/llvm/lib/Target/XCore/ |
XCoreISelDAGToDAG.cpp | 95 if (Addr.getOpcode() == ISD::ADD) { 111 switch (N->getOpcode()) { 191 if (Chain->getOpcode() != ISD::TokenFactor) 214 if (Addr->getOpcode() != ISD::INTRINSIC_W_CHAIN) 244 if (nextAddr->getOpcode() == XCoreISD::PCRelativeWrapper && 245 nextAddr->getOperand(0)->getOpcode() == ISD::TargetBlockAddress) {
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/dalvik/dexgen/src/com/android/dexgen/rop/code/ |
BasicBlock.java | 79 Rop one = insns.get(i).getOpcode(); 87 if (lastInsn.getOpcode().getBranchingness() == Rop.BRANCH_NONE) {
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/dalvik/dx/src/com/android/dx/ssa/ |
MoveParamCombiner.java | 66 if (insn.getOpcode().getOpcode() != RegOps.MOVE_PARAM) {
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/external/dexmaker/src/dx/java/com/android/dx/ssa/ |
MoveParamCombiner.java | 68 if (insn.getOpcode().getOpcode() != RegOps.MOVE_PARAM) {
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/external/llvm/lib/Target/ARM/ |
Thumb1FrameLowering.cpp | 69 unsigned Opc = Old->getOpcode(); 153 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) { 224 if (MI->getOpcode() == ARM::tLDRspi && 228 else if (MI->getOpcode() == ARM::tPOP) { 242 assert((MBBI->getOpcode() == ARM::tBX_RET || 243 MBBI->getOpcode() == ARM::tPOP_RET) && 295 if (MBBI->getOpcode() == ARM::tBX_RET && 297 prior(MBBI)->getOpcode() == ARM::tPOP) {
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