HomeSort by relevance Sort by last modified time
    Searched refs:getOpcode (Results 226 - 250 of 575) sorted by null

1 2 3 4 5 6 7 8 91011>>

  /external/llvm/lib/Target/Hexagon/
HexagonMCInstLower.cpp 44 MCI.setOpcode(MI->getOpcode());
HexagonHardwareLoops.cpp 287 return MI->getOpcode() == Hexagon::LOOP0_r ||
288 MI->getOpcode() == Hexagon::LOOP0_i;
356 unsigned UpdOpc = DI->getOpcode();
502 unsigned CondOpc = CondI->getOpcode();
626 if (StartValInstr && StartValInstr->getOpcode() == Hexagon::TFRI)
631 if (EndValInstr && EndValInstr->getOpcode() == Hexagon::TFRI)
    [all...]
  /external/llvm/lib/Target/Hexagon/MCTargetDesc/
HexagonMCInst.cpp 26 IS = II->beginStage(QII->get(this->getOpcode()).getSchedClass());
  /external/llvm/lib/Target/MSP430/
MSP430MCInstLower.cpp 110 OutMI.setOpcode(MI->getOpcode());
  /external/llvm/lib/Target/Mips/
Mips16RegisterInfo.cpp 138 !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) {
MipsISelDAGToDAG.cpp 93 unsigned Opcode = Node->getOpcode();
MipsSEISelLowering.cpp 144 switch(Op.getOpcode()) {
173 if (ADDCNode->getOpcode() != ISD::ADDC)
179 unsigned MultOpc = MultHi.getOpcode();
249 if (SUBCNode->getOpcode() != ISD::SUBC)
255 unsigned MultOpc = MultHi.getOpcode();
483 if (SetCC.getOpcode() != MipsISD::SETCC_DSP)
496 switch (N->getOpcode()) {
526 switch (MI->getOpcode()) {
630 assert(Op->getOperand(OpNo).getOpcode() == ISD::TargetConstant);
  /external/llvm/lib/Target/SystemZ/
SystemZMCInstLower.cpp 96 unsigned Opcode = MI->getOpcode();
  /external/llvm/lib/Target/XCore/
XCoreFrameLowering.cpp 223 assert(MBBI->getOpcode() == XCore::RETSP_u6
224 || MBBI->getOpcode() == XCore::RETSP_lu6);
335 if (Old->getOpcode() == XCore::ADJCALLSTACKDOWN) {
340 assert(Old->getOpcode() == XCore::ADJCALLSTACKUP);
XCoreMCInstLower.cpp 108 OutMI.setOpcode(MI->getOpcode());
  /external/llvm/utils/TableGen/
DAGISelMatcher.cpp 367 return COM->getOpcode().getEnumName() != getOpcode().getEnumName();
375 if (CT->getResNo() >= getOpcode().getNumResults())
378 MVT::SimpleValueType NodeType = getOpcode().getKnownType(CT->getResNo());
  /external/llvm/lib/IR/
ConstantFold.cpp 87 Instruction::CastOps firstOp = Instruction::CastOps(Op->getOpcode());
221 switch (CE->getOpcode()) {
532 } else if (CE->getOpcode() == Instruction::GetElementPtr) {
611 if (CE->getOpcode() == Instruction::GetElementPtr &&
728 if (TrueVal->getOpcode() == Instruction::Select)
733 if (FalseVal->getOpcode() == Instruction::Select)
    [all...]
Globals.cpp 240 assert((CE->getOpcode() == Instruction::BitCast ||
241 CE->getOpcode() == Instruction::GetElementPtr) &&
  /external/llvm/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp 559 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo;
560 unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
584 switch (MI.getOpcode()) {
624 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo;
625 unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
661 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo;
663 unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
    [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
SelectionDAG.cpp 99 if (N->getOpcode() == ISD::BITCAST)
102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
137 N->getOperand(i).getOpcode() != ISD::UNDEF)
147 if (N->getOpcode() == ISD::BITCAST)
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
155 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
177 N->getOperand(i).getOpcode() != ISD::UNDEF)
186 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
189 if (N->getOpcode() != ISD::BUILD_VECTOR
    [all...]
ScheduleDAGSDNodes.cpp 114 if (Op != 2 || User->getOpcode() != ISD::CopyToReg)
155 DAG->MorphNodeTo(N, N->getOpcode(), VTList, &Ops[0], Ops.size());
389 if (NI->getOpcode() == ISD::TokenFactor)
411 if (SUNode->getOpcode() != ISD::CopyToReg)
485 if(isChain && OpN->getOpcode() == ISD::TokenFactor)
532 if (Node->getOpcode() == ISD::CopyFromReg)
591 if (N && N->getOpcode() == ISD::TokenFactor) {
633 if (Latency > 1 && Use->getOpcode() == ISD::CopyToReg &&
    [all...]
  /dalvik/dexgen/src/com/android/dexgen/rop/code/
BasicBlockList.java 140 if (insn.getOpcode().getOpcode() != RegOps.MARK_LOCAL) {
  /dalvik/dx/src/com/android/dx/command/findusages/
FindUsages.java 84 + " (" + OpcodeInfo.getName(one.getOpcode()) + ")");
94 + " (" + OpcodeInfo.getName(one.getOpcode()) + ")");
  /dalvik/dx/src/com/android/dx/rop/code/
BasicBlockList.java 140 if (insn.getOpcode().getOpcode() != RegOps.MARK_LOCAL) {
  /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/gallivm/
lp_bld_debug.cpp 350 const MCInstrDesc &TID = TII->get(Inst.getOpcode());
352 const TargetInstrDesc &TID = TII->get(Inst.getOpcode());
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/
SIMCCodeEmitter.cpp 260 return MCII.get(MI.getOpcode()).TSFlags & SI_INSTR_FLAGS_ENCODING_MASK;
274 if (MI.getOpcode() == AMDGPU::S_MOV_IMM_I32) {
  /external/clang/include/clang/AST/
StmtVisitor.h 45 switch (BinOp->getOpcode()) {
82 switch (UnOp->getOpcode()) {
  /external/clang/lib/Sema/
SemaFixItUtils.cpp 107 if (UO->getOpcode() == UO_AddrOf) {
141 if (UO->getOpcode() == UO_Deref) {
  /external/dexmaker/src/dx/java/com/android/dx/rop/code/
BasicBlockList.java 140 if (insn.getOpcode().getOpcode() != RegOps.MARK_LOCAL) {
  /external/llvm/include/llvm/Support/
CallSite.h 62 if (II->getOpcode() == Instruction::Call)
64 else if (II->getOpcode() == Instruction::Invoke)

Completed in 1989 milliseconds

1 2 3 4 5 6 7 8 91011>>