/external/v8/test/mjsunit/regress/ |
regress-815.js | 48 // It's OK as long as it does not hit an assert.
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/external/chromium_org/third_party/openssl/openssl/ssl/ |
s2_clnt.c | 219 if (!s->hit) /* new session */ 299 if (s->hit) s->ctx->stats.sess_hit++; 363 s->hit=(*(p++))?1:0; 369 s->hit=(*p)?1:0; p++; 396 if (s->hit) 999 if (!s->hit) /* new session */
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s3_srvr.c | 396 if (s->hit) 404 if (s->hit) 727 if (s->hit) 788 if (s->hit) 1004 s->hit=0; 1032 s->hit=1; 1124 /* If it is a hit, check that the cipher is in the list */ 1125 if ((s->hit) && (i > 0)) [all...] |
/external/openssl/ssl/ |
s2_clnt.c | 219 if (!s->hit) /* new session */ 299 if (s->hit) s->ctx->stats.sess_hit++; 363 s->hit=(*(p++))?1:0; 369 s->hit=(*p)?1:0; p++; 396 if (s->hit) 999 if (!s->hit) /* new session */
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s3_srvr.c | 396 if (s->hit) 404 if (s->hit) 727 if (s->hit) 788 if (s->hit) 1004 s->hit=0; 1032 s->hit=1; 1124 /* If it is a hit, check that the cipher is in the list */ 1125 if ((s->hit) && (i > 0)) [all...] |
/packages/screensavers/PhotoTable/src/com/android/dreams/phototable/ |
PhotoTable.java | 826 Rect hit = new Rect(); local 827 photo.getHitRect(hit); 828 hit.offset(dx, dy); 829 return (hit.bottom < 0f || hit.top > getHeight() || 830 hit.right < 0f || hit.left > getWidth()); [all...] |
/external/chromium/chrome/browser/safe_browsing/ |
safe_browsing_service_browsertest.cc | 123 bool hit = false; local 140 hit = true; 144 return hit; 191 // This function is called when there is a prefix hit in local safebrowsing 316 // full hash is hit in database's local cache. 591 // Now introducing delays and we should hit timeout. 624 // Now introducing delays and we should hit timeout.
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/external/chromium_org/third_party/WebKit/Source/web/ |
WebAccessibilityObject.cpp | 513 RefPtr<AccessibilityObject> hit = m_private->accessibilityHitTest(contentsPoint); local 515 if (hit) 516 return WebAccessibilityObject(hit);
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/external/chromium-trace/trace-viewer/src/tracing/ |
timeline_view.css | 100 .find-control .hit-count-label {
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/external/chromium_org/v8/test/mjsunit/ |
codegen-coverage.js | 102 // (1073741824) is outside the 31-bit smi range so it doesn't hit the
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debug-enable-disable-breakpoints.js | 32 // Simple debug event handler which just counts the number of break points hit.
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debug-ignore-breakpoints.js | 32 // Simple debug event handler which just counts the number of break points hit.
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debug-multiple-breakpoints.js | 32 // Simple debug event handler which just counts the number of break points hit.
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debug-script-breakpoints-nested.js | 32 // Simple debug event handler which just counts the number of break points hit.
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debug-step-2.js | 77 // Step through the function ensuring that the var statements are hit as well.
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debug-step-3.js | 82 // Step through the function ensuring that the var statements are hit as well.
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debug-step-stub-callfunction.js | 32 // Simple debug event handler which counts the number of breaks hit and steps.
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debug-stepin-constructor.js | 32 // Simple debug event handler which counts the number of breaks hit and steps.
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debug-stepout-recursive-function.js | 35 // Simple debug event handler which counts the number of breaks hit and steps.
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/external/chromium_org/v8/test/mjsunit/regress/ |
regress-1015.js | 31 // therefore not hit setters in the prototype.
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regress-1145.js | 33 // Should not hit an assertion in debug mode.
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regress-latin-1.js | 58 // Should have hit the branch for the following char codes:
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/external/linux-tools-perf/ |
builtin-report.c | 128 al.map->dso->hit = 1; 287 (kernel_map->dso->hit &&
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/external/oprofile/events/i386/nehalem/ |
unit_masks | 45 0x02 other_core_l2_hitm Counts number of memory load instructions retired where the memory reference hit modified data in a sibling core residing on the same socket 46 0x08 remote_cache_local_home_hit Counts number of memory load instructions retired where the memory reference missed the L1, L2 and LLC caches and HIT in a remote socket's cache 81 0x01 ld_hit Counts number of loads that hit the L2 cache 84 0x04 rfo_hit Counts the number of store RFO requests that hit the L2 cache 87 0x10 ifetch_hit Counts number of instruction fetches that hit the L2 cache 112 0x0E hit Counts number of L2 store RFO requests where the cache line to be loaded is in either the S, E or M states 118 0xE0 hit Counts number of L2 demand lock RFO requests where the cache line to be loaded is in either the S, E, or M state 145 0x01 hit Counts retired load locks that hit in the L1 data cache or hit in an already allocated fill buffe [all...] |
/external/oprofile/events/mips/r12000/ |
events | 32 event:0x1c counters:0,1,2,3 um:zero minimum:500 name:STATE_OF_SCACHE_INTERVENTION_HIT : State of external intervention hit in secondary cache
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