/bionic/libc/arch-arm/cortex-a15/bionic/ |
memcpy_base.S | 97 ldrbmi lr, [r1], #1 100 ldrbcs ip, [r1], #1 101 ldrbcs lr, [r1], #1 108 vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]! 112 vld1.8 {d0}, [r1]! 120 vld1.8 {d0 - d3}, [r1]! 121 vld1.8 {d4 - d7}, [r1]! 122 pld [r1, #(64*4)] 133 vld1.8 {d0 - d3}, [r1]! 141 vld1.8 {d0, d1}, [r1]! [all...] |
/bionic/libc/arch-arm/bionic/ |
memcmp.S | 48 cmp r0, r1 52 pld [r1, #(CACHE_LINE_SIZE * 0)] 53 pld [r1, #(CACHE_LINE_SIZE * 1)] 70 pld [r1, #(CACHE_LINE_SIZE * 2)] 75 vld1.8 {d4 - d7}, [r1]! 76 pld [r1, #(CACHE_LINE_SIZE * 2)] 94 sub r1, #32 101 addeq r1, #16 129 ldrb ip, [r1], #1 141 eor r0, r4, r1 [all...] |
memset.S | 43 mov r2, r1 44 mov r1, #0 58 vdup.8 q0, r1 73 strmib r1, [r0], #1 74 strcsb r1, [r0], #1 75 strcsb r1, [r0], #1 119 strmib r1, [r0], #1 120 strcsb r1, [r0], #1 121 strcsb r1, [r0], #1 144 /* splat r1 */ [all...] |
_setjmp.S | 51 * r1-r3 are scratch registers in functions 55 ldr r1, .L_setjmp_magic 56 str r1, [r0, #(_JB_MAGIC * 4)] 59 add r1, r0, #(_JB_CORE_BASE * 4) 60 stmia r1, {r4-r14} 64 add r1, r0, #(_JB_FLOAT_BASE * 4) 65 vstmia r1, {d8-d15} 67 fmrx r1, fpscr 68 str r1, [r0, #(_JB_FLOAT_STATE * 4)] 103 mov r0, r1 [all...] |
/dalvik/vm/compiler/template/armv5te/ |
TEMPLATE_MUL_LONG.S | 4 * For JIT: op1 in r0/r1, op2 in r2/r3, return in r0/r1 22 mul ip, r2, r1 @ ip<- ZxW 26 add r1, r2, r10 @ r1<- r10 + low(ZxW + (YxX))
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TEMPLATE_INVOKE_METHOD_CHAIN.S | 7 @ r0 = methodToCall, r1 = returnCell, r2 = methodToCall->outsSize 13 add r3, r1, #1 @ Thumb addr is odd 14 SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area 15 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize) 16 SAVEAREA_FROM_FP(r10, r1) @ r10<- stack save area 21 @ r1 = newFP, r0 = methodToCall, r3 = returnCell, rPC = dalvikCallsite 24 str rPC, [r1, #(offStackSaveArea_savedPc - sizeofStackSaveArea) [all...] |
TEMPLATE_STRING_COMPARETO.S | 4 * Requires r0/r1 to have been previously checked for null. Will 15 * r1: comp object pointer 20 subs r0, r2, r1 @ Same? 24 ldr r9, [r1, #STRING_FIELDOFF_OFFSET] 26 ldr r10, [r1, #STRING_FIELDOFF_COUNT] 28 ldr r1, [r1, #STRING_FIELDOFF_VALUE] 32 * value: r2/r1 44 add r1, r1, r9, lsl # [all...] |
/dalvik/vm/mterp/armv5te/ |
OP_MOVE_16.S | 4 FETCH(r1, 2) @ r1<- BBBB 7 GET_VREG(r2, r1) @ r2<- fp[BBBB]
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OP_MOVE_FROM16.S | 4 FETCH(r1, 1) @ r1<- BBBB 7 GET_VREG(r2, r1) @ r2<- fp[BBBB]
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OP_SHR_LONG.S | 15 ldmia r3, {r0-r1} @ r0/r1<- vBB/vBB+1 21 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2)) 23 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32) 29 mov r1, r1, asr r2 @ r1<- r1 >> r [all...] |
OP_SHR_LONG_2ADDR.S | 13 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1 17 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2)) 20 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32) 21 mov r1, r1, asr r2 @ r1<- r1 >> r [all...] |
OP_USHR_LONG.S | 15 ldmia r3, {r0-r1} @ r0/r1<- vBB/vBB+1 21 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2)) 23 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32) 29 mov r1, r1, lsr r2 @ r1<- r1 >>> r [all...] |
OP_USHR_LONG_2ADDR.S | 13 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1 17 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2)) 20 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32) 21 mov r1, r1, lsr r2 @ r1<- r1 >>> r [all...] |
OP_BREAKPOINT.S | 12 ldr r1, [rSELF, #offThread_mainHandlerTable] 15 GOTO_OPCODE_BASE(r1, r0)
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binopWide2addr.S | 1 %default {"preinstr":"", "result0":"r0", "result1":"r1", "chkzero":"0"} 4 * that specifies an instruction that performs "result = r0-r1 op r2-r3". 9 * vCC (r1). Useful for integer division and modulus. 18 mov r1, rINST, lsr #12 @ r1<- B 20 add r1, rFP, r1, lsl #2 @ r1<- &fp[B] 22 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1 23 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+ [all...] |
zcmp.S | 13 FETCH_S(r1, 1) @ r1<- branch offset, in code units 15 mov${revcmp} r1, #2 @ r1<- inst branch dist for not-taken 16 adds r1, r1, r1 @ convert to bytes & set flags 17 FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
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/dalvik/vm/mterp/armv6t2/ |
OP_SHR_LONG_2ADDR.S | 12 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1 16 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2)) 19 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32) 20 mov r1, r1, asr r2 @ r1<- r1 >> r [all...] |
OP_USHR_LONG_2ADDR.S | 12 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1 16 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2)) 19 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32) 20 mov r1, r1, lsr r2 @ r1<- r1 >>> r [all...] |
OP_IPUT_WIDE_QUICK.S | 4 mov r1, rINST, lsr #12 @ r1<- B 6 GET_VREG(r2, r1) @ r2<- fp[B], the object pointer 9 ldmia r3, {r0-r1} @ r0/r1<- fp[A] 13 strd r0, [r2, r3] @ obj.field (64 bits, aligned)<- r0/r1
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binopWide2addr.S | 1 %default {"preinstr":"", "result0":"r0", "result1":"r1", "chkzero":"0"} 4 * that specifies an instruction that performs "result = r0-r1 op r2-r3". 9 * vCC (r1). Useful for integer division and modulus. 17 mov r1, rINST, lsr #12 @ r1<- B 19 add r1, rFP, r1, lsl #2 @ r1<- &fp[B] 21 ldmia r1, {r2-r3} @ r2/r3<- vBB/vBB+1 22 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+ [all...] |
/external/chromium_org/ui/gfx/ |
path_aura.cc | 26 NativeRegion Path::IntersectRegions(NativeRegion r1, NativeRegion r2) { 28 new_region->op(*r1, *r2, SkRegion::kIntersect_Op); 33 NativeRegion Path::CombineRegions(NativeRegion r1, NativeRegion r2) { 35 new_region->op(*r1, *r2, SkRegion::kUnion_Op); 40 NativeRegion Path::SubtractRegion(NativeRegion r1, NativeRegion r2) { 42 new_region->op(*r1, *r2, SkRegion::kDifference_Op);
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/external/llvm/test/MC/ARM/ |
arm-aliases.s | 5 add r1, r2, r3, lsl #0 6 sub r1, r2, r3, ror #0 7 eor r1, r2, r3, lsr #0 8 orr r1, r2, r3, asr #0 9 and r1, r2, r3, ror #0 10 bic r1, r2, r3, lsl #0 12 @ CHECK: add r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe0] 13 @ CHECK: sub r1, r2, r3 @ encoding: [0x03,0x10,0x42,0xe0] 14 @ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0] 15 @ CHECK: orr r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe1 [all...] |
mode-switch.s | 6 add.w r0, r0, r1 7 @ CHECK: add.w r0, r0, r1 @ encoding: [0x00,0xeb,0x01,0x00] 10 add r0, r0, r1 11 @ CHECK: add r0, r0, r1 @ encoding: [0x01,0x00,0x80,0xe0] 14 adds r0, r0, r1 15 @ CHECK: adds r0, r0, r1 @ encoding: [0x40,0x18] 18 add r0, r0, r1 19 @ CHECK: add r0, r0, r1 @ encoding: [0x01,0x00,0x80,0xe0] 22 add.w r0, r0, r1 23 adds r0, r0, r1 [all...] |
/external/valgrind/main/none/tests/arm/ |
v6intARM.stdout.exp | 2 mov r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 3 cpy r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 6 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 7 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x40000000 Z 8 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 0, cpsr 0x80000000 N 11 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 1, cpsr 0x20000000 C 12 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 1, cpsr 0x60000000 ZC 13 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 1, cpsr 0xa0000000 N C 17 mvn r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x00000000 18 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x80000000 N [all...] |
/external/clang/test/FixIt/ |
typo.c | 33 Rectangle r1; // expected-error{{must use 'struct' tag to refer to type 'Rectangle'}} local 35 r1.top_left.x = 0; 38 rectangle *r2 = &r1; // expected-error{{unknown type name 'rectangle'; did you mean 'Rectangle'?}}
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