/external/llvm/test/CodeGen/ARM/ |
2012-05-04-vmov.ll | 3 ; Check that swift doesn't use vmov.32. <rdar://problem/10453003>. 9 ; A9-CHECK: vmov.32 10 ; vmov.32 should not be used to get a lane: 11 ; vmov.32 <dst>, <src>[<lane>]. 12 ; but vmov.32 <dst>[<lane>], <src> is fine. 13 ; SWIFT-CHECK-NOT: vmov.32 {{r[0-9]+}}, {{d[0-9]\[[0-9]+\]}}
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fp.ll | 5 ;CHECK: vmov 7 ;CHECK-NEXT: vmov 15 ;CHECK: vmov 17 ;CHECK-NEXT: vmov 25 ;CHECK: vmov 27 ;CHECK-NEXT: vmov 35 ;CHECK: vmov 37 ;CHECK-NEXT: vmov 46 ;CHECK-NEXT: vmov 61 ;CHECK-NOT: vmov [all...] |
peephole-bitcast.ll | 5 ; vmov s0, r0 + vmov r0, s0 should have been optimized away. 14 ; CHECK-NOT: vmov
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vcombine.ll | 5 ; CHECK: vmov r0, r1, d16 6 ; CHECK: vmov r2, r3, d17 15 ; CHECK: vmov r0, r1, d16 16 ; CHECK: vmov r2, r3, d17 25 ; CHECK: vmov r0, r1, d16 26 ; CHECK: vmov r2, r3, d17 35 ; CHECK: vmov r0, r1, d16 36 ; CHECK: vmov r2, r3, d17 45 ; CHECK: vmov r0, r1, d16 46 ; CHECK: vmov r2, r3, d1 [all...] |
fpconsts.ll | 6 ; CHECK: vmov.f32 s{{.*}}, #4.000000e+00 14 ; CHECK: vmov.f64 d{{.*}}, #3.000000e+00 22 ; CHECK: vmov.f64 d{{.*}}, #-1.300000e+01 30 ; CHECK: vmov.f32 s{{.*}}, #-2.400000e+01
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a15-partial-update.ll | 8 ; be incorrect to fully write it (with a vmov.f64) before the 9 ; vld1.32 instruction. The test checks that a vmov.f64 was not 12 ; CHECK-NOT: vmov.{{.*}} d{{[0-9]+}}, 24 ; We check that a dependency breaking vmov* instruction was 27 ; CHECK: vmov.{{.*}} d{{[0-9]+}},
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fast-isel-conversion.ll | 10 ; ARM: vmov s0, r0 13 ; THUMB: vmov s0, r0 25 ; ARM: vmov s0, r0 29 ; THUMB: vmov s0, r0 41 ; ARM: vmov s0, r0 45 ; THUMB: vmov s0, r0 56 ; ARM: vmov s0, r0 59 ; THUMB: vmov s0, r0 71 ; ARM: vmov s0, r0 75 ; THUMB: vmov s0, r [all...] |
twoaddrinstr.ll | 10 ; CHECK-NEXT: vmov.f32 11 ; CHECK-NEXT: vmov.f32
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vget_lane.ll | 7 ;CHECK: vmov.s8 16 ;CHECK: vmov.s16 25 ;CHECK: vmov.u8 34 ;CHECK: vmov.u16 44 ;CHECK: vmov.32 53 ;CHECK: vmov.s8 62 ;CHECK: vmov.s16 71 ;CHECK: vmov.u8 80 ;CHECK: vmov.u16 90 ;CHECK: vmov.3 [all...] |
arguments_f64_backfill.ll | 4 ; CHECK: vmov.f32 s0, s1
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/external/llvm/test/MC/ARM/ |
neont2-mov-encoding.s | 5 vmov.i8 d16, #0x8 6 vmov.i16 d16, #0x10 7 vmov.i16 d16, #0x1000 8 vmov.i32 d16, #0x20 9 vmov.i32 d16, #0x2000 10 vmov.i32 d16, #0x200000 11 vmov.i32 d16, #0x20000000 12 vmov.i32 d16, #0x20FF 13 vmov.i32 d16, #0x20FFFF 14 vmov.i64 d16, #0xFF0000FF0000FFF [all...] |
neon-mov-encoding.s | 3 vmov.i8 d16, #0x8 4 vmov.i16 d16, #0x10 5 vmov.i16 d16, #0x1000 6 vmov.i32 d16, #0x20 7 vmov.i32 d16, #0x2000 8 vmov.i32 d16, #0x200000 9 vmov.i32 d16, #0x20000000 10 vmov.i32 d16, #0x20FF 11 vmov.i32 d16, #0x20FFFF 12 vmov.i64 d16, #0xFF0000FF0000FFF [all...] |
simple-fp-encoding.s | 144 vmov.f32 r1, s2 145 vmov.f32 s4, r3 146 vmov.f64 r1, r5, d2 147 vmov.f64 d4, r3, r9 149 @ CHECK: vmov r1, s2 @ encoding: [0x10,0x1a,0x11,0xee] 150 @ CHECK: vmov s4, r3 @ encoding: [0x10,0x3a,0x02,0xee] 151 @ CHECK: vmov r1, r5, d2 @ encoding: [0x12,0x1b,0x55,0xec] 152 @ CHECK: vmov d4, r3, r9 @ encoding: [0x14,0x3b,0x49,0xec] 176 vmov.f64 d16, #3.000000e+00 177 vmov.f32 s0, #3.000000e+0 [all...] |
/hardware/samsung_slsi/exynos5/libswconverter/ |
csc_ARGB8888_to_YUV420SP_NEON.s | 42 vmov.u16 q6, #66 @coefficient assignment 43 vmov.u16 q7, #129 44 vmov.u16 q8, #25 45 vmov.u16 q9, #0x8080 @ 128<<8 + 128 47 vmov.u16 q10, #0x1000 @ 16<<8 + 128 50 vmov.u16 q11, #38 @#-38 51 vmov.u16 q12, #74 @#-74 52 vmov.u16 q13, #112 53 vmov.u16 q14, #94 @#-94 54 vmov.u16 q15, #18 @#-1 [all...] |
/external/libyuv/files/source/ |
compare_neon.cc | 23 "vmov.u8 q8, #0 \n" 24 "vmov.u8 q10, #0 \n" 25 "vmov.u8 q9, #0 \n" 26 "vmov.u8 q11, #0 \n" 46 "vmov.32 %3, d0[0] \n"
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/external/webrtc/src/modules/audio_coding/codecs/isac/fix/source/ |
lpc_masking_model_neon.S | 37 vmov.s64 q11, #0 @ Initialize shift_internal. 38 vmov.s64 q13, #0 @ Initialize sum64. 39 vmov.s64 q10, #0 40 vmov.u8 d20[0], r4 @ Set q10 to 1. 54 vmov.s64 q15, #0 @ Initialize the sum64_tmp. 68 vmov.u32 d0[0], r8 69 vmov.u32 d1[0], r5 88 vmov.s64 q15, q14 104 vmov.s64 q13, q0 @ update sum64. 113 vmov.s32 d0[0], r [all...] |
/external/libvpx/libvpx/vp8/common/arm/neon/ |
variance_neon.asm | 29 vmov.i8 q8, #0 ;q8 - sum 30 vmov.i8 q9, #0 ;q9, q10 - sse 31 vmov.i8 q10, #0 76 ;vmov.32 r0, d0[0] ;this instruction costs a lot 77 ;vmov.32 r1, d1[0] 89 vmov.32 r0, d0[0] ;return 102 vmov.i8 q8, #0 ;q8 - sum 103 vmov.i8 q9, #0 ;q9, q10 - sse 104 vmov.i8 q10, #0 151 vmov.32 r0, d0[0] ;retur [all...] |
/external/clang/test/CodeGen/ |
struct-matching-constraint.c | 8 __asm__("vmov.16 %1, %0 \n\t"
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/external/compiler-rt/lib/arm/ |
adddf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6 22 vmov d7, r2, r3 // move second param from r2/r3 pair into d7 24 vmov r0, r1, d6 // move result back to r0/r1 pair
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addsf3vfp.S | 21 vmov s14, r0 // move first param from r0 into float register 22 vmov s15, r1 // move second param from r1 into float register 24 vmov r0, s14 // move result back to r0
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divdf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6 22 vmov d7, r2, r3 // move second param from r2/r3 pair into d7 24 vmov r0, r1, d5 // move result back to r0/r1 pair
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divsf3vfp.S | 21 vmov s14, r0 // move first param from r0 into float register 22 vmov s15, r1 // move second param from r1 into float register 24 vmov r0, s13 // move result back to r0
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muldf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6 22 vmov d7, r2, r3 // move second param from r2/r3 pair into d7 24 vmov r0, r1, d6 // move result back to r0/r1 pair
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mulsf3vfp.S | 21 vmov s14, r0 // move first param from r0 into float register 22 vmov s15, r1 // move second param from r1 into float register 24 vmov r0, s13 // move result back to r0
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subdf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6 22 vmov d7, r2, r3 // move second param from r2/r3 pair into d7 24 vmov r0, r1, d6 // move result back to r0/r1 pair
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