| /dalvik/vm/mterp/armv5te/ |
| OP_ADD_FLOAT.S | 2 %include "armv5te/binop.S" {"instr":"bl __aeabi_fadd"}
|
| OP_ADD_INT.S | 2 %include "armv5te/binop.S" {"instr":"add r0, r0, r1"}
|
| OP_AND_INT.S | 2 %include "armv5te/binop.S" {"instr":"and r0, r0, r1"}
|
| OP_DIV_FLOAT.S | 2 %include "armv5te/binop.S" {"instr":"bl __aeabi_fdiv"}
|
| OP_DIV_INT.S | 2 %include "armv5te/binop.S" {"instr":"bl __aeabi_idiv","chkzero":"1"}
|
| OP_MUL_FLOAT.S | 2 %include "armv5te/binop.S" {"instr":"bl __aeabi_fmul"}
|
| OP_OR_INT.S | 2 %include "armv5te/binop.S" {"instr":"orr r0, r0, r1"}
|
| OP_SUB_FLOAT.S | 2 %include "armv5te/binop.S" {"instr":"bl __aeabi_fsub"}
|
| OP_SUB_INT.S | 2 %include "armv5te/binop.S" {"instr":"sub r0, r0, r1"}
|
| OP_XOR_INT.S | 2 %include "armv5te/binop.S" {"instr":"eor r0, r0, r1"}
|
| OP_MUL_INT.S | 3 %include "armv5te/binop.S" {"instr":"mul r0, r1, r0"}
|
| OP_REM_FLOAT.S | 3 %include "armv5te/binop.S" {"instr":"bl fmodf"}
|
| /dalvik/vm/mterp/mips/ |
| OP_ADD_INT.S | 2 %include "mips/binop.S" {"instr":"addu a0, a0, a1"}
|
| OP_AND_INT.S | 2 %include "mips/binop.S" {"instr":"and a0, a0, a1"}
|
| OP_MUL_INT.S | 2 %include "mips/binop.S" {"instr":"mul a0, a0, a1"}
|
| OP_OR_INT.S | 2 %include "mips/binop.S" {"instr":"or a0, a0, a1"}
|
| OP_SUB_INT.S | 2 %include "mips/binop.S" {"instr":"subu a0, a0, a1"}
|
| OP_XOR_INT.S | 2 %include "mips/binop.S" {"instr":"xor a0, a0, a1"}
|
| OP_DIV_INT.S | 2 %include "mips/binop.S" {"instr":"div zero, a0, a1; mflo a0", "chkzero":"1"}
|
| OP_REM_INT.S | 2 %include "mips/binop.S" {"instr":"div zero, a0, a1; mfhi a0", "chkzero":"1"}
|
| /dalvik/vm/mterp/x86/ |
| OP_ADD_INT.S | 2 %include "x86/binop.S" {"instr":"addl (rFP,%ecx,4),%eax"}
|
| OP_AND_INT.S | 2 %include "x86/binop.S" {"instr":"andl (rFP,%ecx,4),%eax"}
|
| OP_OR_INT.S | 2 %include "x86/binop.S" {"instr":"orl (rFP,%ecx,4),%eax"}
|
| OP_SUB_INT.S | 2 %include "x86/binop.S" {"instr":"subl (rFP,%ecx,4),%eax"}
|
| OP_XOR_INT.S | 2 %include "x86/binop.S" {"instr":"xorl (rFP,%ecx,4),%eax"}
|
