| /art/runtime/ |
| disassembler_arm.cc | 374 uint32_t imm2 = ((instr >> 6) & 0x3); local
375 uint32_t imm5 = ((imm3 << 3) | imm2) & 0x1F;
709 uint32_t imm2 = (instr >> 6) & 0x3; local
711 uint32_t lsb = (imm3 << 2) | imm2;
859 // STRB Rt,[Rn,Rm,lsl #imm2] - 111 11 00 0 0 00 0 nnnn tttt 0 00000 ii mmmm
867 uint32_t imm2 = (instr >> 4) & 3; local
871 args << ", " << "lsl #" << imm2; local
914 uint32_t imm2 = (instr >> 4) & 3; local
918 args << ", lsl #" << imm2; local
1008 uint32_t imm2 = (instr >> 4) & 0xF; local
1013 args << ", lsl #" << imm2; local
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| FastISel.h | 291 uint64_t Imm1, uint64_t Imm2);
314 uint64_t Imm1, uint64_t Imm2);
325 uint64_t Imm1, uint64_t Imm2);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | [all...] |
| /external/valgrind/main/none/tests/ppc32/ |
| test_dfp5.c | 234 typedef void (*test_func_t)(unsigned int imm, unsigned int imm2, dfp_val_t valB);
|
| /external/valgrind/main/none/tests/ppc64/ |
| test_dfp5.c | 234 typedef void (*test_func_t)(unsigned int imm, unsigned int imm2, dfp_val_t valB);
|
| /art/compiler/dex/quick/arm/ |
| arm_lir.h | 425 kThumb2Bfi, // bfi [111100110110] rn[19-16] [0] imm3[14-12] rd[11-8] imm2[7-6] [0] msb[4-0].
426 kThumb2Bfc, // bfc [11110011011011110] [0] imm3[14-12] rd[11-8] imm2[7-6] [0] msb[4-0].
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| ArmLIR.h | 624 rd[11-8] imm2[7-6] [0] msb[4-0] */
626 rd[11-8] imm2[7-6] [0] msb[4-0] */
[all...] |
| Assemble.cpp | 2642 int imm2 = (insn >> 4) & 0x3; local
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMInstrThumb2.td | 263 // t2addrmode_so_reg := reg + (reg << imm2)
588 let Inst{7-6} = 0b00; // imm2
672 let Inst{7-6} = 0b00; // imm2
793 let Inst{7-6} = 0b00; // imm2
835 let Inst{7-6} = 0b00; // imm2
[all...] |
| ARMFastISel.cpp | 137 uint64_t Imm1, uint64_t Imm2);
459 uint64_t Imm1, uint64_t Imm2) {
465 .addImm(Imm1).addImm(Imm2));
468 .addImm(Imm1).addImm(Imm2));
[all...] |
| Thumb2SizeReduction.cpp | 61 // Wide, Narrow1, Narrow2, imm1,imm2, lo1, lo2, P/C,PF,S,AM
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_peephole.cpp | 552 const int s, ImmediateValue& imm2)
558 float f = imm2.reg.data.f32;
574 // d = mul a, imm2 -> d = mul r, (imm1 * imm2)
[all...] |
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_peephole.cpp | 552 const int s, ImmediateValue& imm2)
558 float f = imm2.reg.data.f32;
574 // d = mul a, imm2 -> d = mul r, (imm1 * imm2)
[all...] |
| /external/valgrind/main/VEX/priv/ |
| host_ppc_defs.c | [all...] |
| /external/qemu/ |
| elf.h | [all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| Assemble.cpp | 2016 int imm2 = (insn >> 4) & 0x3; local
[all...] |
| /external/llvm/lib/Target/X86/ |
| README-SSE.txt | 502 INSERTPS can match any insert (extract, imm1), imm2 for 4 x float, and insert
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.td | 161 class COMBINE_imm<Operand imm1, Operand imm2, PatLeaf pat1, PatLeaf pat2> :
162 ALU32_ii<(outs DoubleRegs:$dst), (ins imm1:$src1, imm2:$src2),
[all...] |
| /external/elfutils/libelf/ |
| elf.h | [all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXIntrinsics.td | [all...] |
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/ |
| elf.h | [all...] |
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/ |
| elf.h | [all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/ |
| elf.h | [all...] |
