| /dalvik/vm/analysis/ |
| Liveness.cpp | 284 static inline void GEN(BitVector* workBits, u4 regIndex)
286 dvmSetBit(workBits, regIndex);
292 static inline void GENW(BitVector* workBits, u4 regIndex)
294 dvmSetBit(workBits, regIndex);
295 dvmSetBit(workBits, regIndex+1);
301 static inline void KILL(BitVector* workBits, u4 regIndex)
303 dvmClearBit(workBits, regIndex);
309 static inline void KILLW(BitVector* workBits, u4 regIndex)
311 dvmClearBit(workBits, regIndex);
312 dvmClearBit(workBits, regIndex+1)
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUInstrInfo.h | 155 /// \brief Calculate the "Indirect Address" for the given \p RegIndex and
160 /// address in this virtual address space that maps to the given \p RegIndex
162 virtual unsigned calculateIndirectAddress(unsigned RegIndex,
|
| AMDGPUIndirectAddressing.cpp | 98 unsigned RegIndex = MI.getOperand(2).getImm();
100 unsigned Address = TII->calculateIndirectAddress(RegIndex, Channel);
248 unsigned RegIndex = MI.getOperand(2).getImm();
250 unsigned Address = TII->calculateIndirectAddress(RegIndex, Channel);
|
| SIInstrInfo.h | 55 virtual unsigned calculateIndirectAddress(unsigned RegIndex,
|
| SIInstrInfo.cpp | 231 unsigned SIInstrInfo::calculateIndirectAddress(unsigned RegIndex,
234 return RegIndex;
|
| R600InstrInfo.h | 196 virtual unsigned calculateIndirectAddress(unsigned RegIndex,
|
| R600ISelLowering.cpp | 500 int64_t RegIndex = cast<ConstantSDNode>(Op.getOperand(3))->getZExtValue();
501 unsigned Reg = AMDGPU::R600_TReg32RegClass.getRegister(RegIndex);
534 int64_t RegIndex = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
535 unsigned Reg = AMDGPU::R600_TReg32RegClass.getRegister(RegIndex);
[all...] |
| R600InstrInfo.cpp | 1027 unsigned R600InstrInfo::calculateIndirectAddress(unsigned RegIndex,
1031 return RegIndex;
[all...] |
| /external/llvm/lib/CodeGen/ |
| ExecutionDepsFix.cpp | 164 int regIndex(unsigned Reg);
195 int ExeDepsFix::regIndex(unsigned Reg) {
358 int rx = regIndex(*i);
466 int rx = regIndex(MO.getReg());
515 int rx = regIndex(mo.getReg());
524 int rx = regIndex(mo.getReg());
544 int rx = regIndex(mo.getReg());
636 int rx = regIndex(mo.getReg());
|
| /external/chromium_org/third_party/yasm/source/patched-yasm/libyasm/ |
| arch.h | 172 unsigned long regindex);
384 * \param regindex register index
385 * \return 0 if regindex is not valid for that register group, otherwise the
389 unsigned long regindex);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 99 int64_t RegIndex = MI->getOperand(1).getImm();
100 unsigned ConstantReg = AMDGPU::R600_CReg32RegClass.getRegister(RegIndex);
261 int64_t RegIndex = cast<ConstantSDNode>(Op.getOperand(3))->getZExtValue();
262 unsigned Reg = AMDGPU::R600_TReg32RegClass.getRegister(RegIndex);
282 int64_t RegIndex = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
283 unsigned Reg = AMDGPU::R600_TReg32RegClass.getRegister(RegIndex);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 99 int64_t RegIndex = MI->getOperand(1).getImm();
100 unsigned ConstantReg = AMDGPU::R600_CReg32RegClass.getRegister(RegIndex);
261 int64_t RegIndex = cast<ConstantSDNode>(Op.getOperand(3))->getZExtValue();
262 unsigned Reg = AMDGPU::R600_TReg32RegClass.getRegister(RegIndex);
282 int64_t RegIndex = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
283 unsigned Reg = AMDGPU::R600_TReg32RegClass.getRegister(RegIndex);
|
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/ |
| x86arch.c | 489 unsigned long regindex)
496 if (regindex > 15)
498 return reggroup | (regindex & 15);
503 if (regindex > 7)
505 return reggroup | (regindex & 7);
|
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/lc3b/ |
| lc3barch.c | 129 /*@unused@*/ unsigned long regindex)
|
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/parsers/nasm/ |
| nasm-parse.c | 931 unsigned long regindex; local
[all...] |
| /dalvik/vm/compiler/ |
| Dataflow.cpp | 1159 int regIndex)
1163 uses[regIndex] = ssaReg;
1168 int regIndex)
1181 defs[regIndex] = ssaReg;
[all...] |
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/parsers/gas/ |
| gas-parse.c | 1262 unsigned long regindex; local
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| CodegenDriver.cpp | 561 int regIndex = r7; /* Preserved across call */
564 loadValueDirectFixed(cUnit, rlIndex, regIndex);
579 genBoundsCheck(cUnit, regIndex, regLen, mir->offset,
605 dvmCompilerLockTemp(cUnit, regIndex); // r7
621 storeBaseIndexed(cUnit, regPtr, regIndex, r0,
626 dvmCompilerFreeTemp(cUnit, regIndex);
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| CodegenDriver.cpp | 617 int regIndex = r_S4; /* Preserved across call */
623 dvmCompilerLockTemp(cUnit, regIndex); // r_S4
626 loadValueDirectFixed(cUnit, rlIndex, regIndex);
641 genBoundsCheck(cUnit, regIndex, regLen, mir->offset,
682 storeBaseIndexed(cUnit, regPtr, regIndex, r_A0,
687 dvmCompilerFreeTemp(cUnit, regIndex);
[all...] |
| /external/valgrind/main/VEX/priv/ |
| host_x86_defs.c | [all...] |
| host_amd64_defs.c | [all...] |
