| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeonsi/ |
| radeonsi_resource.h | 34 struct si_resource { struct
46 si_resource_reference(struct si_resource **ptr, struct si_resource *res)
52 static INLINE struct si_resource *
53 si_resource(struct pipe_resource *r) function
55 return (struct si_resource*)r;
58 static INLINE struct si_resource *
63 return si_resource(pipe_buffer_create(screen,
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| r600_buffer.c | 43 struct si_resource *rbuffer = si_resource(buf);
75 struct si_resource *rbuffer = si_resource(transfer->resource);
118 struct si_resource *res,
163 struct si_resource *rbuffer;
167 rbuffer = MALLOC_STRUCT(si_resource);
188 void r600_upload_const_buffer(struct r600_context *rctx, struct si_resource **rbuffer,
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| radeonsi_pipe.h | 54 struct si_resource *bo;
99 struct si_resource *sleep_bo;
197 struct si_resource *res,
271 struct si_resource *rresource = (struct si_resource*)resource;
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| r600.h | 79 struct si_resource *buffer;
90 struct si_resource *filled_size;
115 void si_context_emit_fence(struct r600_context *ctx, struct si_resource *fence,
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| r600_resource.h | 42 struct si_resource resource;
75 void r600_upload_const_buffer(struct r600_context *rctx, struct si_resource **rbuffer,
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| radeonsi_pm4.h | 55 struct si_resource *bo[SI_PM4_MAX_BO];
69 struct si_resource *bo,
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| r600_hw_context_priv.h | 38 static INLINE unsigned r600_context_bo_reloc(struct r600_context *ctx, struct si_resource *rbo,
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| radeonsi_shader.h | 76 struct si_resource *bo;
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| r600_texture.c | 224 struct si_resource *resource = &rtex->resource;
248 struct si_resource *resource = &rtex->resource;
251 si_resource_reference((struct si_resource **)&rtex->flushed_depth_texture, NULL);
410 buf = si_resource(rtransfer->staging_texture)->cs_buf;
417 buf = si_resource(transfer->resource)->cs_buf;
439 buf = si_resource(rtransfer->staging_texture)->cs_buf;
446 buf = si_resource(transfer->resource)->cs_buf;
475 struct si_resource *resource;
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| si_state_draw.c | 421 struct si_resource *rbuffer;
428 rbuffer = (struct si_resource*)vb->buffer;
494 si_pm4_add_bo(pm4, (struct si_resource *)ib->buffer, RADEON_USAGE_READ);
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| radeonsi_pm4.c | 89 struct si_resource *bo,
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| r600_hw_context.c | 39 struct si_resource *buffer;
238 void si_context_emit_fence(struct r600_context *ctx, struct si_resource *fence_bo, unsigned offset, unsigned value)
689 cs->buf[cs->cdw++] = r600_context_bo_reloc(ctx, (struct si_resource*)t->b.buffer,
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| si_state_streamout.c | 80 si_context_bo_reloc(ctx, si_resource(t[i]->b.buffer),
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| radeonsi_resource.h | 34 struct si_resource { struct
46 si_resource_reference(struct si_resource **ptr, struct si_resource *res)
52 static INLINE struct si_resource *
53 si_resource(struct pipe_resource *r) function
55 return (struct si_resource*)r;
58 static INLINE struct si_resource *
63 return si_resource(pipe_buffer_create(screen,
|
| r600_buffer.c | 43 struct si_resource *rbuffer = si_resource(buf);
75 struct si_resource *rbuffer = si_resource(transfer->resource);
118 struct si_resource *res,
163 struct si_resource *rbuffer;
167 rbuffer = MALLOC_STRUCT(si_resource);
188 void r600_upload_const_buffer(struct r600_context *rctx, struct si_resource **rbuffer,
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| radeonsi_pipe.h | 54 struct si_resource *bo;
99 struct si_resource *sleep_bo;
197 struct si_resource *res,
271 struct si_resource *rresource = (struct si_resource*)resource;
|
| r600.h | 79 struct si_resource *buffer;
90 struct si_resource *filled_size;
115 void si_context_emit_fence(struct r600_context *ctx, struct si_resource *fence,
|
| r600_resource.h | 42 struct si_resource resource;
75 void r600_upload_const_buffer(struct r600_context *rctx, struct si_resource **rbuffer,
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| radeonsi_pm4.h | 55 struct si_resource *bo[SI_PM4_MAX_BO];
69 struct si_resource *bo,
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| r600_hw_context_priv.h | 38 static INLINE unsigned r600_context_bo_reloc(struct r600_context *ctx, struct si_resource *rbo,
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| radeonsi_shader.h | 76 struct si_resource *bo;
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| r600_texture.c | 224 struct si_resource *resource = &rtex->resource;
248 struct si_resource *resource = &rtex->resource;
251 si_resource_reference((struct si_resource **)&rtex->flushed_depth_texture, NULL);
410 buf = si_resource(rtransfer->staging_texture)->cs_buf;
417 buf = si_resource(transfer->resource)->cs_buf;
439 buf = si_resource(rtransfer->staging_texture)->cs_buf;
446 buf = si_resource(transfer->resource)->cs_buf;
475 struct si_resource *resource;
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| si_state_draw.c | 421 struct si_resource *rbuffer;
428 rbuffer = (struct si_resource*)vb->buffer;
494 si_pm4_add_bo(pm4, (struct si_resource *)ib->buffer, RADEON_USAGE_READ);
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| radeonsi_pm4.c | 89 struct si_resource *bo,
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| r600_hw_context.c | 39 struct si_resource *buffer;
238 void si_context_emit_fence(struct r600_context *ctx, struct si_resource *fence_bo, unsigned offset, unsigned value)
689 cs->buf[cs->cdw++] = r600_context_bo_reloc(ctx, (struct si_resource*)t->b.buffer,
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