| /external/valgrind/main/memcheck/tests/amd64/ |
| xor-undef-amd64.stdout.exp | 14 Complain sse2 pxor
16 No complain sse2 pxor
18 Complain sse2 xorpd
20 No complain sse2 xorpd
|
| /external/valgrind/main/memcheck/tests/x86/ |
| sse2_memory.vgtest | 3 args: sse2
4 prereq: ../../../tests/x86_amd64_features x86-sse2
|
| /external/llvm/test/Analysis/CostModel/X86/ |
| uitofp.ll | 1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 ; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
10 ; SSE2: uitofpv2i8v2double
11 ; SSE2: cost of 20 {{.*}} uitofp
12 ; SSE2-CODEGEN: uitofpv2i8v2double
13 ; SSE2-CODEGEN: movapd LCPI
14 ; SSE2-CODEGEN: subpd
15 ; SSE2-CODEGEN: addpd
21 ; SSE2: uitofpv4i8v4double
22 ; SSE2: cost of 40 {{.*}} uitof
[all...] |
| sitofp.ll | 1 ; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
4 ; SSE2: sitofpv2i8v2double
5 ; SSE2: cost of 20 {{.*}} sitofp
11 ; SSE2: sitofpv4i8v4double
12 ; SSE2: cost of 40 {{.*}} sitofp
18 ; SSE2: sitofpv8i8v8double
19 ; SSE2: cost of 80 {{.*}} sitofp
25 ; SSE2: sitofpv16i8v16double
26 ; SSE2: cost of 160 {{.*}} sitofp
32 ; SSE2: sitofpv32i8v32doubl
[all...] |
| testshiftashr.ll | 1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 ; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2: shift2i16
8 ; SSE2: cost of 20 {{.*}} ashr
9 ; SSE2-CODEGEN: shift2i16
10 ; SSE2-CODEGEN: sarq %cl
19 ; SSE2: shift4i16
20 ; SSE2: cost of 40 {{.*}} ashr
21 ; SSE2-CODEGEN: shift4i16
22 ; SSE2-CODEGEN: sarl %c
[all...] |
| testshiftlshr.ll | 1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 ; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2: shift2i16
8 ; SSE2: cost of 20 {{.*}} lshr
9 ; SSE2-CODEGEN: shift2i16
10 ; SSE2-CODEGEN: shrq %cl
19 ; SSE2: shift4i16
20 ; SSE2: cost of 40 {{.*}} lshr
21 ; SSE2-CODEGEN: shift4i16
22 ; SSE2-CODEGEN: shrl %c
[all...] |
| testshiftshl.ll | 1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 ; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2: shift2i16
8 ; SSE2: cost of 20 {{.*}} shl
9 ; SSE2-CODEGEN: shift2i16
10 ; SSE2-CODEGEN: shlq %cl
19 ; SSE2: shift4i16
20 ; SSE2: cost of 10 {{.*}} shl
21 ; SSE2-CODEGEN: shift4i16
22 ; SSE2-CODEGEN: pmulud
[all...] |
| div.ll | 1 ; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
6 ; SSE2: div_sse
7 ; SSE2: cost of 320 {{.*}} sdiv
9 ; SSE2: cost of 160 {{.*}} sdiv
11 ; SSE2: cost of 80 {{.*}} sdiv
13 ; SSE2: cost of 40 {{.*}} sdiv
17 ; SSE2: div_avx
|
| /external/llvm/test/CodeGen/X86/ |
| barrier-sse.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep sfence
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep lfence
3 ; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep mfence
4 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep MEMBARRIER
|
| lfence.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep lfence
3 declare void @llvm.x86.sse2.lfence() nounwind
6 call void @llvm.x86.sse2.lfence()
|
| mfence.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep sfence
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep lfence
3 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mfence
|
| vec_setcc.ll | 1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse2 | FileCheck %s -check-prefix=SSE2
9 ; SSE2-LABEL: v16i8_icmp_uge:
10 ; SSE2: pmaxub %xmm0, %xmm1
11 ; SSE2: pcmpeqb %xmm1, %xmm0
26 ; SSE2-LABEL: v16i8_icmp_ule:
27 ; SSE2: pminub %xmm0, %xmm1
28 ; SSE2: pcmpeqb %xmm1, %xmm0
44 ; SSE2-LABEL: v8i16_icmp_uge:
45 ; SSE2: movdqa {{.*}}(%rip), %xmm
[all...] |
| barrier.ll | 1 ; RUN: llc < %s -march=x86 -mattr=-sse2 | grep lock
|
| maskmovdqu.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep -i EDI
2 ; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep -i RDI
7 tail call void @llvm.x86.sse2.maskmov.dqu( <16 x i8> %a, <16 x i8> %b, i8* %c )
11 declare void @llvm.x86.sse2.maskmov.dqu(<16 x i8>, <16 x i8>, i8*) nounwind
|
| vec_shuffle-16.ll | 1 ; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=+sse,-sse2 -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=sse
2 ; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=+sse2 -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=sse2
5 ; sse2-LABEL: t1:
8 ; sse2: pshufd
9 ; sse2-NEXT: ret
15 ; sse2-LABEL: t2:
18 ; sse2: pshufd
19 ; sse2-NEXT: ret
25 ; sse2-LABEL: t3
[all...] |
| vec_compare-sse4.ll | 1 ; RUN: llc < %s -march=x86 -mattr=-sse3,+sse2 | FileCheck %s -check-prefix=SSE2
12 ; SSE2-LABEL: test1:
13 ; SSE2-NOT: pcmpgtq
14 ; SSE2: ret
28 ; SSE2-LABEL: test2:
29 ; SSE2-NOT: pcmpeqq
30 ; SSE2: ret
|
| fast-isel-fneg.ll | 2 ; RUN: llc < %s -fast-isel -march=x86 -mattr=+sse2 | FileCheck --check-prefix=SSE2 %s
4 ; SSE2: xor
5 ; SSE2: xor
6 ; SSE2-NOT: xor
|
| avx-sext.ll | 3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=pentium4 | FileCheck %s -check-prefix=SSE2
31 ; SSE2: load_sext_test1
32 ; SSE2: movq
33 ; SSE2: punpcklwd %xmm{{.*}}, %xmm{{.*}}
34 ; SSE2: psrad $16
35 ; SSE2: ret
52 ; SSE2: load_sext_test2
53 ; SSE2: movl
54 ; SSE2: psrad $24
55 ; SSE2: re
[all...] |
| memcpy-2.ll | 1 ; RUN: llc < %s -mattr=+sse2 -mtriple=i686-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=SSE2-Darwin
2 ; RUN: llc < %s -mattr=+sse2 -mtriple=i686-pc-mingw32 -mcpu=core2 | FileCheck %s -check-prefix=SSE2-Mingw32
3 ; RUN: llc < %s -mattr=+sse,-sse2 -mtriple=i686-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=SSE1
12 ; SSE2-Darwin-LABEL: t1:
13 ; SSE2-Darwin: movsd _.str+16, %xmm0
14 ; SSE2-Darwin: movsd %xmm0, 16(%esp)
15 ; SSE2-Darwin: movaps _.str, %xmm0
16 ; SSE2-Darwin: movaps %xmm
[all...] |
| vec_set-C.ll | 1 ; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 | grep movq
2 ; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 | grep mov | count 1
3 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-linux -mattr=+sse2 | grep movd
|
| combine-lds.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fldl | count 1
|
| /external/valgrind/main/none/tests/x86/ |
| bug137714-x86.vgtest | 2 prereq: ../../../tests/x86_amd64_features x86-sse2
|
| /external/pixman/pixman/ |
| Makefile.win32 | 12 SSE2_VAR = $(SSE2)
26 # SSE2 compilation flags
29 libpixman_sources += pixman-sse2.c
51 ifneq ($(SSE2),off)
52 ifneq ($(SSE2),on)
53 ifneq ($(SSE2),)
54 @echo "Invalid specified SSE option : "$(SSE2)"."
56 @echo "Possible choices for SSE2 are 'on' or 'off'"
59 @echo "Setting SSE2 flag to default value 'on'... (use SSE2=on or SSE2=off)
[all...] |
| /external/clang/test/Preprocessor/ |
| x86_target_features.c | 12 // RUN: %clang -target i386-unknown-unknown -march=core2 -msse4 -mno-sse2 -x c -E -dM -o - %s | FileCheck --check-prefix=SSE %s
23 // RUN: %clang -target i386-unknown-unknown -march=pentium-m -x c -E -dM -o - %s | FileCheck --check-prefix=SSE2 %s
25 // SSE2: #define __SSE2_MATH__ 1
26 // SSE2: #define __SSE2__ 1
27 // SSE2-NOT: #define __SSE3__ 1
28 // SSE2-NOT: #define __SSE4_1__ 1
29 // SSE2-NOT: #define __SSE4_2__ 1
30 // SSE2: #define __SSE_MATH__ 1
31 // SSE2: #define __SSE__ 1
32 // SSE2-NOT: #define __SSSE3__
[all...] |
| /external/clang/test/CodeGen/ |
| x86_32-arguments-nommx.c | 1 // RUN: %clang_cc1 -target-feature -mmx -target-feature +sse2 -triple i686-pc-linux-gnu -emit-llvm -o - %s | FileCheck %s
8 // but SSE2 vectors should still go into an SSE2 register
|
