| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/ |
| mixcase.asm | 1 CPU SSSE3
|
| /external/valgrind/main/none/tests/amd64/ |
| ssse3_misaligned.vgtest | 2 prereq: ../../../tests/x86_amd64_features amd64-ssse3
|
| insn_ssse3.vgtest | 2 prereq: ../../../tests/x86_amd64_features amd64-ssse3
|
| /external/valgrind/main/none/tests/x86/ |
| ssse3_misaligned.vgtest | 2 prereq: test -x ssse3_misaligned && ../../../tests/x86_amd64_features x86-ssse3
|
| insn_ssse3.vgtest | 2 prereq: test -x insn_ssse3 && ../../../tests/x86_amd64_features x86-ssse3
|
| /external/llvm/test/CodeGen/X86/ |
| avx-sext.ll | 2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=SSSE3
25 ; SSSE3: load_sext_test1
26 ; SSSE3: movq
27 ; SSSE3: punpcklwd %xmm{{.*}}, %xmm{{.*}}
28 ; SSSE3: psrad $16
29 ; SSSE3: ret
46 ; SSSE3: load_sext_test2
47 ; SSSE3: movd
48 ; SSSE3: pshufb
49 ; SSSE3: psrad $2
[all...] |
| viabs.ll | 2 ; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s -check-prefix=SSSE3
13 ; SSSE3-LABEL: test1:
14 ; SSSE3: pabsd
15 ; SSSE3-NEXT: ret
34 ; SSSE3-LABEL: test2:
35 ; SSSE3: pabsd
36 ; SSSE3-NEXT: ret
55 ; SSSE3-LABEL: test3:
56 ; SSSE3: pabsw
57 ; SSSE3-NEXT: re
[all...] |
| phaddsub.ll | 1 ; RUN: llc < %s -march=x86-64 -mattr=+ssse3,-avx | FileCheck %s -check-prefix=SSSE3
2 ; RUN: llc < %s -march=x86-64 -mattr=-ssse3,+avx | FileCheck %s -check-prefix=AVX
4 ; SSSE3-LABEL: phaddw1:
5 ; SSSE3-NOT: vphaddw
6 ; SSSE3: phaddw
16 ; SSSE3-LABEL: phaddw2:
17 ; SSSE3-NOT: vphaddw
18 ; SSSE3: phaddw
28 ; SSSE3-LABEL: phaddd1
[all...] |
| palignr-2.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+ssse3 | FileCheck %s
12 %0 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %a, <2 x i64> %b, i8 24) nounwind readnone
17 declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i8) nounwind readnone
25 %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 32) nounwind readnone
|
| /bionic/libc/arch-x86/ |
| x86.mk | 17 arch-x86/string/ssse3-memcpy-atom.S \
18 arch-x86/string/ssse3-memmove-atom.S \
19 arch-x86/string/ssse3-bcopy-atom.S \
20 arch-x86/string/ssse3-strncat-atom.S \
21 arch-x86/string/ssse3-strncpy-atom.S \
22 arch-x86/string/ssse3-strlcat-atom.S \
23 arch-x86/string/ssse3-strlcpy-atom.S \
24 arch-x86/string/ssse3-strcmp-atom.S \
25 arch-x86/string/ssse3-strncmp-atom.S \
26 arch-x86/string/ssse3-strcat-atom.S
[all...] |
| /external/clang/test/Sema/ |
| x86-builtin-palignr.c | 1 // RUN: %clang_cc1 -ffreestanding -fsyntax-only -target-feature +ssse3 -target-feature +mmx -verify -triple x86_64-pc-linux-gnu %s
2 // RUN: %clang_cc1 -ffreestanding -fsyntax-only -target-feature +ssse3 -target-feature +mmx -verify -triple i686-apple-darwin10 %s
|
| /external/libyuv/ |
| README.google | 9 Specifically libyuv is optimized for SSE2/SSSE3 and Neon and has demonstrated
|
| /external/clang/lib/Headers/ |
| module.map | 63 explicit module ssse3 {
64 requires ssse3
71 export ssse3
|
| /external/llvm/test/Bitcode/ |
| ssse3_palignr.ll | 8 %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 15) ; <<2 x i64>> [#uses=1]
17 %2 = tail call <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64> %1, <1 x i64> %0, i8 7) ; <<1 x i64>> [#uses=1]
23 declare <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64>, <1 x i64>, i8) nounwind readnone
29 %2 = tail call <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64> %1, <1 x i64> %0, i8 16) ; <<1 x i64>> [#uses=1]
39 %2 = tail call <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64> %1, <1 x i64> %0, i8 9) ; <<1 x i64>> [#uses=1]
49 %2 = tail call <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64> %1, <1 x i64> %0, i8 8) ; <<1 x i64>> [#uses=1]
59 %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 32) ; <<2 x i64>> [#uses=1]
64 declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i8) nounwind readnone
70 %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 17) ; <<2 x i64>> [#uses=1]
79 %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 16) ; <<2 x i64>> [#uses=1
[all...] |
| /external/libvpx/libvpx/vp9/encoder/x86/ |
| vp9_subpel_variance.asm | 130 %if cpuflag(ssse3)
137 ; FIXME(rbultje) only bilinear filters use >8 registers, and ssse3 only uses
376 %if notcpuflag(ssse3) ; FIXME(rbultje) don't scatter registers on x86-64
405 %if cpuflag(ssse3)
451 %if cpuflag(ssse3)
674 %if notcpuflag(ssse3) ; FIXME(rbultje) don't scatter registers on x86-64
708 %if cpuflag(ssse3)
751 %if notcpuflag(ssse3)
762 %if cpuflag(ssse3)
822 %if notcpuflag(ssse3) ; FIXME(rbultje) don't scatter registers on x86-6
[all...] |
| /bionic/libc/arch-x86/string/ |
| ssse3-bcopy-atom.S | 35 #include "ssse3-memcpy-atom.S"
|
| ssse3-memcmp16-atom.S | 37 #include "ssse3-memcmp-atom.S"
|
| ssse3-memmove-atom.S | 34 #include "ssse3-memcpy-atom.S"
|
| ssse3-strncat-atom.S | 34 #include "ssse3-strcat-atom.S"
|
| ssse3-strncmp-atom.S | 34 #include "ssse3-strcmp-atom.S"
|
| ssse3-strncpy-atom.S | 33 #include "ssse3-strcpy-atom.S"
|
| ssse3-wmemcmp-atom.S | 35 #include "ssse3-memcmp-atom.S"
|
| /external/chromium_org/base/ |
| cpu.h | 25 SSSE3,
|
| /external/chromium_org/media/base/simd/ |
| convert_rgb_to_yuv_ssse3.h | 12 // The header file for ASM functions that convert a row of RGB pixels with SSSE3
|
| /external/clang/test/CodeGen/ |
| palignr.c | 2 // RUN: %clang_cc1 %s -triple=i686-apple-darwin -target-feature +ssse3 -O1 -S -o - | FileCheck %s
|
