| /external/llvm/test/CodeGen/Mips/ |
| swzero.ll | 7 ; CHECK: swl $zero
|
| load-store-left-right.ll | 21 ; EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
23 ; EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
|
| mips64load-store-left-right.ll | 65 ; EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
67 ; EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
|
| /external/valgrind/main/none/tests/mips32/ |
| LoadStore.stdout.exp | 172 swl
173 swl $t0, 0($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 0($t1) :: RTval: 0x0, out: 0x121f1e00
175 swl $t0, 0($t1) :: RTval: 0x31415927, out: 0x31
176 swl $t0, 0($t1) :: RTval: 0x31415927, out: 0x121f1e31
177 swl $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x7f
178 swl $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x121f1e7f
179 swl $t0, 0($t1) :: RTval: 0x80000000, out: 0x80
180 swl $t0, 0($t1) :: RTval: 0x80000000, out: 0x121f1e80
181 swl $t0, 2($t1) :: RTval: 0x80000000, out: 0x8
[all...] |
| LoadStore.stdout.exp-BE | 172 swl
173 swl $t0, 0($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 0($t1) :: RTval: 0x0, out: 0x0
175 swl $t0, 0($t1) :: RTval: 0x31415927, out: 0x31415927
176 swl $t0, 0($t1) :: RTval: 0x31415927, out: 0x31415927
177 swl $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x7fffffff
178 swl $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x7fffffff
179 swl $t0, 0($t1) :: RTval: 0x80000000, out: 0x80000000
180 swl $t0, 0($t1) :: RTval: 0x80000000, out: 0x80000000
181 swl $t0, 2($t1) :: RTval: 0x80000000, out: 0x8000000
[all...] |
| LoadStore1.stdout.exp | 172 swl
173 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
175 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31000000
176 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31000000
177 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7fffff00
178 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7fffff00
179 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80000000
180 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80000000
181 swl $t0, 9($t1) :: RTval: 0x80000000, out: 0x8000000
[all...] |
| LoadStore1.stdout.exp-LE | 172 swl
173 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 1($t1) :: RTval: 0x0, out: 0x121f00
175 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31
176 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31
177 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7f
178 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x300007f
179 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80
180 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x380
181 swl $t0, 9($t1) :: RTval: 0x80000000, out: 0x8
[all...] |
| LoadStore.c | 52 // swl $t0, 3($t1)
61 "swl $t0, 3($t1) \n\t" \
68 printf("swl $t0, 3($t1)\nswr $t0, 0($t1)\n :: RTval: 0x%x, out: 0x%x\n", \
225 printf("swl\n");
226 TESTINST1("swl $t0, 0($t1)", 0, 0, t0, t1);
227 TESTINST1("swl $t0, 0($t1)", 0x31415927, 0, t0, t1);
228 TESTINST1("swl $t0, 0($t1)", 0x7fffffff, 0, t0, t1);
229 TESTINST1("swl $t0, 0($t1)", 0x80000000, 0, t0, t1);
230 TESTINST1("swl $t0, 2($t1)", 0x80000000, 2, t0, t1);
231 TESTINST1("swl $t0, 6($t1)", 0x7fffffff, 6, t0, t1)
[all...] |
| LoadStore1.c | 52 // swl $t0, 3($t1)
61 "swl $t0, 3($t1) \n\t" \
68 printf("swl $t0, 3($t1)\nswr $t0, 0($t1)\n :: RTval: 0x%x, out: 0x%x\n", \
225 printf("swl\n");
226 TESTINST1("swl $t0, 1($t1)", 0, 1, t0, t1);
227 TESTINST1("swl $t0, 3($t1)", 0x31415927, 3, t0, t1);
228 TESTINST1("swl $t0, 5($t1)", 0x7fffffff, 5, t0, t1);
229 TESTINST1("swl $t0, 7($t1)", 0x80000000, 7, t0, t1);
230 TESTINST1("swl $t0, 9($t1)", 0x80000000, 9, t0, t1);
231 TESTINST1("swl $t0, 6($t1)", 0x7fffffff, 6, t0, t1)
[all...] |
| /bionic/libc/arch-mips/include/machine/ |
| asm.h | 70 #define SWLO swl
81 #define SWHI swl
|
| /development/ndk/platforms/android-9/arch-mips/include/machine/ |
| asm.h | 70 #define SWLO swl
81 #define SWHI swl
|
| /external/llvm/test/MC/Mips/ |
| mips-memory-instructions.s | 13 # CHECK: swl $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa8]
20 swl $4, 16($5)
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/machine/ |
| asm.h | 70 #define SWLO swl
81 #define SWHI swl
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/machine/ |
| asm.h | 70 #define SWLO swl
81 #define SWHI swl
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/machine/ |
| asm.h | 70 #define SWLO swl
81 #define SWHI swl
|
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/machine/ |
| asm.h | 70 #define SWLO swl
81 #define SWHI swl
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/machine/ |
| asm.h | 70 #define SWLO swl
81 #define SWHI swl
|
| /system/core/libcutils/tests/memset_mips/ |
| memset_omips.S | 30 # define SWHI swl /* high part is left in big-endian */
|
| /bionic/libc/arch-mips/string/ |
| memset.S | 50 # define SWHI swl /* high part is left in big-endian */
56 # define SWLO swl /* low part is left in little-endian */
|
| memcpy.S | 51 # define SWHI swl /* high part is left in big-endian */
60 # define SWLO swl /* low part is left in big-endian */
|
| /external/qemu/target-mips/ |
| helper.h | 15 DEF_HELPER_3(swl, void, tl, tl, int)
|
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-mips.cc | 831 // Test LWL, LWR, SWL and SWR instructions.
894 // Test all combinations of SWL and vAddr.
898 __ swl(t0, MemOperand(a0, OFFSET_OF(T, swl_0)) );
903 __ swl(t1, MemOperand(a0, OFFSET_OF(T, swl_1) + 1) );
908 __ swl(t2, MemOperand(a0, OFFSET_OF(T, swl_2) + 2) );
913 __ swl(t3, MemOperand(a0, OFFSET_OF(T, swl_3) + 3) );
[all...] |
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 837 // Test LWL, LWR, SWL and SWR instructions.
899 // Test all combinations of SWL and vAddr.
903 __ swl(t0, MemOperand(a0, OFFSET_OF(T, swl_0)) );
908 __ swl(t1, MemOperand(a0, OFFSET_OF(T, swl_1) + 1) );
913 __ swl(t2, MemOperand(a0, OFFSET_OF(T, swl_2) + 2) );
918 __ swl(t3, MemOperand(a0, OFFSET_OF(T, swl_3) + 3) );
[all...] |
| /external/pixman/pixman/ |
| pixman-mips-memcpy-asm.S | 39 # define SWHI swl /* high part is left in big-endian */
46 # define SWLO swl /* low part is left in big-endian */
|
| /external/chromium_org/v8/src/mips/ |
| constants-mips.cc | 338 case SWL:
|
