Lines Matching refs:Rt
352 ArmRegister Rt(instr, 12);
357 args << Rd << ", " << Rt << ", [" << Rn << ", #" << (imm8 << 2) << "]";
360 args << Rt << ", [" << Rn << ", #" << (imm8 << 2) << "]";
858 // STRB Rt,[Rn,#+/-imm8] - 111 11 00 0 0 00 0 nnnn tttt 1 PUWii ii iiii
859 // STRB Rt,[Rn,Rm,lsl #imm2] - 111 11 00 0 0 00 0 nnnn tttt 0 00000 ii mmmm
861 ArmRegister Rt(instr, 12);
865 args << Rt << ", [" << Rn << ",#" << imm8 << "]";
869 args << Rt << ", [" << Rn << ", " << Rm;
879 ArmRegister Rt(instr, 12);
882 // STR Rt, [Rn, #imm8] - 111 11 000 010 0 nnnn tttt 1PUWiiiiiiii
890 args << Rt;
899 args << Rt << ", [" << Rn;
910 // STR Rt, [Rn, Rm, LSL #imm2] - 111 11 000 010 0 nnnn tttt 000000iimmmm
912 ArmRegister Rt(instr, 12);
916 args << Rt << ", [" << Rn << ", " << Rm;
923 // STR.W Rt, [Rn, #imm12] - 111 11 000 110 0 nnnn tttt iiiiiiiiiiii
926 args << Rt << ", [" << Rn << ", #" << imm12 << "]";
942 // |111|11|00|op3|01|1| Rn | Rt | op4 | |
946 ArmRegister Rt(instr, 12);
947 if (Rt.r != 15) {
949 // LDRH.W Rt, [Rn, #imm12] - 111 11 00 01 011 nnnn tttt iiiiiiiiiiii
952 args << Rt << ", [" << Rn << ", #" << imm12 << "]";
962 // LDRSH.W Rt, [Rn, #imm12] - 111 11 00 11 011 nnnn tttt iiiiiiiiiiii
965 args << Rt << ", [" << Rn << ", #" << imm12 << "]";
986 // |111|11|00|op3|10|1| Rn | Rt | op4 | |
991 ArmRegister Rt(instr, 12);
993 // LDR.W Rt, [Rn, #imm12] - 111 11 00 00 101 nnnn tttt iiiiiiiiiiii
994 // LDR.W Rt, [PC, #imm12] - 111 11 00 0x 101 1111 tttt iiiiiiiiiiii
997 args << Rt << ", [" << Rn << ", #" << imm12 << "]";
1007 // LDR.W Rt, [Rn, Rm{, LSL #imm2}] - 111 11 00 00 101 nnnn tttt 000000iimmmm
1011 args << Rt << ", [" << Rn << ", " << rm;
1017 // LDRT Rt, [Rn, #imm8] - 111 11 00 00 101 nnnn tttt 1110iiiiiiii
1020 args << Rt << ", [" << Rn << ", #" << imm8 << "]";
1173 ThumbRegister Rt(instr, 8);
1176 args << Rt << ", [pc, #" << (imm8 << 2) << "]";
1186 ThumbRegister Rt(instr, 0);
1197 args << Rt << ", [" << Rn << ", " << Rm << "]";
1200 ThumbRegister Rt(instr, 8);
1203 args << Rt << ", [sp, #" << (imm8 << 2) << "]";
1208 ThumbRegister Rt(instr, 0);
1223 args << Rt << ", [" << Rn << ", #" << imm5 << "]";
1318 // STR Rt, [Rn, #imm] - 01100 iiiii nnn ttt
1319 // LDR Rt, [Rn, #imm] - 01101 iiiii nnn ttt
1322 ThumbRegister Rt(instr, 0);
1324 args << Rt << ", [" << Rn << ", #" << (imm5 << 2) << "]";
1328 // STR Rt, [SP, #imm] - 01100 ttt iiiiiiii
1329 // LDR Rt, [SP, #imm] - 01101 ttt iiiiiiii
1331 ThumbRegister Rt(instr, 8);
1333 args << Rt << ", [sp, #" << (imm8 << 2) << "]";
