Lines Matching refs:destination
77 // the same as the destination, the destination is ignored and
99 // Clear this move's destination to indicate a pending move. The actual
100 // destination is saved on the side.
102 LOperand* destination = moves_[index].destination();
107 // as this one's destination blocks this one so recursively perform all
111 if (other_move.Blocks(destination) && !other_move.IsPending()) {
117 // not be swapped). Since this move's destination is B and there is
126 // pending, so restore its destination.
127 moves_[index].set_destination(destination);
131 if (moves_[index].source()->Equals(destination)) {
141 if (other_move.Blocks(destination)) {
157 LOperand* destination = move.destination();
158 if (destination->IsRegister()) ++destination_uses_[destination->index()];
171 LOperand* destination = moves_[index].destination();
172 if (destination->IsRegister()) {
173 --destination_uses_[destination->index()];
174 ASSERT(destination_uses_[destination->index()] >= 0);
217 // No operand should be the destination for more than one move.
219 LOperand* destination = moves_[i].destination();
221 SLOW_ASSERT(!destination->Equals(moves_[j].destination()));
278 LOperand* destination = moves_[index].destination();
280 EnsureRestored(destination);
282 // Dispatch on the source and destination operand kinds. Not all
285 ASSERT(destination->IsRegister() || destination->IsStackSlot());
287 Operand dst = cgen_->ToOperand(destination);
291 ASSERT(destination->IsRegister() || destination->IsStackSlot());
293 if (destination->IsRegister()) {
294 Register dst = cgen_->ToRegister(destination);
300 Operand dst = cgen_->ToOperand(destination);
307 if (destination->IsRegister()) {
308 Register dst = cgen_->ToRegister(destination);
316 } else if (destination->IsDoubleRegister()) {
323 XMMRegister dst = cgen_->ToDoubleRegister(destination);
335 X87Register dst = cgen_->ToX87Register(destination);
340 ASSERT(destination->IsStackSlot());
341 Operand dst = cgen_->ToOperand(destination);
357 if (destination->IsDoubleRegister()) {
358 XMMRegister dst = cgen_->ToDoubleRegister(destination);
361 ASSERT(destination->IsDoubleStackSlot());
362 Operand dst = cgen_->ToOperand(destination);
366 // load from the register onto the stack, store in destination, which must
368 ASSERT(destination->IsDoubleStackSlot());
369 Operand dst = cgen_->ToOperand(destination);
376 ASSERT(destination->IsDoubleRegister() ||
377 destination->IsDoubleStackSlot());
379 if (destination->IsDoubleRegister()) {
380 XMMRegister dst = cgen_->ToDoubleRegister(destination);
384 Operand dst = cgen_->ToOperand(destination);
390 // store in destination. If destination is a double register, then it
392 if (destination->IsDoubleStackSlot()) {
396 Operand dst0 = cgen_->ToOperand(destination);
397 Operand dst1 = cgen_->HighOperand(destination);
398 __ mov(tmp, src0); // Then use tmp to copy source to destination.
404 X87Register dst = cgen_->ToX87Register(destination);
418 LOperand* destination = moves_[index].destination();
420 EnsureRestored(destination);
422 // Dispatch on the source and destination operand kinds. Not all
424 if (source->IsRegister() && destination->IsRegister()) {
427 Register dst = cgen_->ToRegister(destination);
430 } else if ((source->IsRegister() && destination->IsStackSlot()) ||
431 (source->IsStackSlot() && destination->IsRegister())) {
437 cgen_->ToRegister(source->IsRegister() ? source : destination);
439 cgen_->ToOperand(source->IsRegister() ? destination : source);
450 } else if (source->IsStackSlot() && destination->IsStackSlot()) {
456 Operand dst = cgen_->ToOperand(destination);
470 } else if (source->IsDoubleRegister() && destination->IsDoubleRegister()) {
475 XMMRegister dst = cgen_->ToDoubleRegister(destination);
479 } else if (source->IsDoubleRegister() || destination->IsDoubleRegister()) {
483 ASSERT(source->IsDoubleStackSlot() || destination->IsDoubleStackSlot());
486 : destination);
488 cgen_->ToOperand(source->IsDoubleRegister() ? destination : source);
492 } else if (source->IsDoubleStackSlot() && destination->IsDoubleStackSlot()) {
500 Operand dst0 = cgen_->ToOperand(destination);
501 Operand dst1 = cgen_->HighOperand(destination);
502 __ movdbl(xmm0, dst0); // Save destination in xmm0.
503 __ mov(tmp, src0); // Then use tmp to copy source to destination.
514 // The swap of source and destination has executed a move from source to
515 // destination.
519 // this move's source or destination needs to have their source
524 moves_[i].set_source(destination);
525 } else if (other_move.Blocks(destination)) {
532 if (source->IsRegister() && destination->IsRegister()) {
534 source_uses_[source->index()] = source_uses_[destination->index()];
535 source_uses_[destination->index()] = temp;
537 // We don't have use counts for non-register operands like destination.
540 } else if (destination->IsRegister()) {
541 source_uses_[destination->index()] = CountSourceUses(destination);
