Lines Matching refs:BIT
26 #define MACEPCI_ERROR_MASTER_ABORT BIT(31)
27 #define MACEPCI_ERROR_TARGET_ABORT BIT(30)
28 #define MACEPCI_ERROR_DATA_PARITY_ERR BIT(29)
29 #define MACEPCI_ERROR_RETRY_ERR BIT(28)
30 #define MACEPCI_ERROR_ILLEGAL_CMD BIT(27)
31 #define MACEPCI_ERROR_SYSTEM_ERR BIT(26)
32 #define MACEPCI_ERROR_INTERRUPT_TEST BIT(25)
33 #define MACEPCI_ERROR_PARITY_ERR BIT(24)
34 #define MACEPCI_ERROR_OVERRUN BIT(23)
35 #define MACEPCI_ERROR_RSVD BIT(22)
36 #define MACEPCI_ERROR_MEMORY_ADDR BIT(21)
37 #define MACEPCI_ERROR_CONFIG_ADDR BIT(20)
38 #define MACEPCI_ERROR_MASTER_ABORT_ADDR_VALID BIT(19)
39 #define MACEPCI_ERROR_TARGET_ABORT_ADDR_VALID BIT(18)
40 #define MACEPCI_ERROR_DATA_PARITY_ADDR_VALID BIT(17)
41 #define MACEPCI_ERROR_RETRY_ADDR_VALID BIT(16)
42 #define MACEPCI_ERROR_SIG_TABORT BIT(4)
47 #define MACEPCI_ERROR_FBB BIT(1)
48 #define MACEPCI_ERROR_66MHZ BIT(0)
50 #define MACEPCI_CONTROL_INT(x) BIT(x)
52 #define MACEPCI_CONTROL_SERR_ENA BIT(8)
53 #define MACEPCI_CONTROL_ARB_N6 BIT(9)
54 #define MACEPCI_CONTROL_PARITY_ERR BIT(10)
55 #define MACEPCI_CONTROL_MRMRA_ENA BIT(11)
56 #define MACEPCI_CONTROL_ARB_N3 BIT(12)
57 #define MACEPCI_CONTROL_ARB_N4 BIT(13)
58 #define MACEPCI_CONTROL_ARB_N5 BIT(14)
59 #define MACEPCI_CONTROL_PARK_LIU BIT(15)
60 #define MACEPCI_CONTROL_INV_INT(x) BIT(16+x)
62 #define MACEPCI_CONTROL_OVERRUN_INT BIT(24)
63 #define MACEPCI_CONTROL_PARITY_INT BIT(25)
64 #define MACEPCI_CONTROL_SERR_INT BIT(26)
65 #define MACEPCI_CONTROL_IT_INT BIT(27)
66 #define MACEPCI_CONTROL_RE_INT BIT(28)
67 #define MACEPCI_CONTROL_DPED_INT BIT(29)
68 #define MACEPCI_CONTROL_TAR_INT BIT(30)
69 #define MACEPCI_CONTROL_MAR_INT BIT(31)
152 #define MACEPAR_CONTEXT_LASTFLAG BIT(63)
163 #define MACEPAR_CTLSTAT_DIRECTION BIT(0)
165 #define MACEPAR_CTLSTAT_ENABLE BIT(1)
167 #define MACEPAR_CTLSTAT_RESET BIT(2)
168 #define MACEPAR_CTLSTAT_CTXB_VALID BIT(3)
169 #define MACEPAR_CTLSTAT_CTXA_VALID BIT(4)
171 #define MACEPAR_DIAG_CTXINUSE BIT(0)
173 #define MACEPAR_DIAG_DMACTIVE BIT(1)
186 #define MACEISA_FLASH_WE BIT(0) /* 1=> Enable FLASH writes */
187 #define MACEISA_PWD_CLEAR BIT(1) /* 1=> PWD CLEAR jumper detected */
188 #define MACEISA_NIC_DEASSERT BIT(2)
189 #define MACEISA_NIC_DATA BIT(3)
190 #define MACEISA_LED_RED BIT(4) /* 0=> Illuminate red LED */
191 #define MACEISA_LED_GREEN BIT(5) /* 0=> Illuminate green LED */
192 #define MACEISA_DP_RAM_ENABLE BIT(6)
196 #define MACEISA_AUDIO_SW_INT BIT(0)
197 #define MACEISA_AUDIO_SC_INT BIT(1)
198 #define MACEISA_AUDIO1_DMAT_INT BIT(2)
199 #define MACEISA_AUDIO1_OF_INT BIT(3)
200 #define MACEISA_AUDIO2_DMAT_INT BIT(4)
201 #define MACEISA_AUDIO2_MERR_INT BIT(5)
202 #define MACEISA_AUDIO3_DMAT_INT BIT(6)
203 #define MACEISA_AUDIO3_MERR_INT BIT(7)
204 #define MACEISA_RTC_INT BIT(8)
205 #define MACEISA_KEYB_INT BIT(9)
206 #define MACEISA_KEYB_POLL_INT BIT(10)
207 #define MACEISA_MOUSE_INT BIT(11)
208 #define MACEISA_MOUSE_POLL_INT BIT(12)
209 #define MACEISA_TIMER0_INT BIT(13)
210 #define MACEISA_TIMER1_INT BIT(14)
211 #define MACEISA_TIMER2_INT BIT(15)
212 #define MACEISA_PARALLEL_INT BIT(16)
213 #define MACEISA_PAR_CTXA_INT BIT(17)
214 #define MACEISA_PAR_CTXB_INT BIT(18)
215 #define MACEISA_PAR_MERR_INT BIT(19)
216 #define MACEISA_SERIAL1_INT BIT(20)
217 #define MACEISA_SERIAL1_TDMAT_INT BIT(21)
218 #define MACEISA_SERIAL1_TDMAPR_INT BIT(22)
219 #define MACEISA_SERIAL1_TDMAME_INT BIT(23)
220 #define MACEISA_SERIAL1_RDMAT_INT BIT(24)
221 #define MACEISA_SERIAL1_RDMAOR_INT BIT(25)
222 #define MACEISA_SERIAL2_INT BIT(26)
223 #define MACEISA_SERIAL2_TDMAT_INT BIT(27)
224 #define MACEISA_SERIAL2_TDMAPR_INT BIT(28)
225 #define MACEISA_SERIAL2_TDMAME_INT BIT(29)
226 #define MACEISA_SERIAL2_RDMAT_INT BIT(30)
227 #define MACEISA_SERIAL2_RDMAOR_INT BIT(31)
253 #define MACEI2C_RESET BIT(0)
254 #define MACEI2C_FAST BIT(1)
255 #define MACEI2C_DATA_OVERRIDE BIT(2)
256 #define MACEI2C_CLOCK_OVERRIDE BIT(3)
257 #define MACEI2C_DATA_STATUS BIT(4)
258 #define MACEI2C_CLOCK_STATUS BIT(5)
