Lines Matching defs:_ULCAST_
35 #define _ULCAST_
37 #define _ULCAST_ (unsigned long)
228 #define IE_SW0 (_ULCAST_(1) << 8)
229 #define IE_SW1 (_ULCAST_(1) << 9)
230 #define IE_IRQ0 (_ULCAST_(1) << 10)
231 #define IE_IRQ1 (_ULCAST_(1) << 11)
232 #define IE_IRQ2 (_ULCAST_(1) << 12)
233 #define IE_IRQ3 (_ULCAST_(1) << 13)
234 #define IE_IRQ4 (_ULCAST_(1) << 14)
235 #define IE_IRQ5 (_ULCAST_(1) << 15)
240 #define C_SW0 (_ULCAST_(1) << 8)
241 #define C_SW1 (_ULCAST_(1) << 9)
242 #define C_IRQ0 (_ULCAST_(1) << 10)
243 #define C_IRQ1 (_ULCAST_(1) << 11)
244 #define C_IRQ2 (_ULCAST_(1) << 12)
245 #define C_IRQ3 (_ULCAST_(1) << 13)
246 #define C_IRQ4 (_ULCAST_(1) << 14)
247 #define C_IRQ5 (_ULCAST_(1) << 15)
289 #define ST0_UM (_ULCAST_(1) << 4)
290 #define ST0_IL (_ULCAST_(1) << 23)
291 #define ST0_DL (_ULCAST_(1) << 24)
336 #define STATUSF_IP0 (_ULCAST_(1) << 8)
338 #define STATUSF_IP1 (_ULCAST_(1) << 9)
340 #define STATUSF_IP2 (_ULCAST_(1) << 10)
342 #define STATUSF_IP3 (_ULCAST_(1) << 11)
344 #define STATUSF_IP4 (_ULCAST_(1) << 12)
346 #define STATUSF_IP5 (_ULCAST_(1) << 13)
348 #define STATUSF_IP6 (_ULCAST_(1) << 14)
350 #define STATUSF_IP7 (_ULCAST_(1) << 15)
352 #define STATUSF_IP8 (_ULCAST_(1) << 0)
354 #define STATUSF_IP9 (_ULCAST_(1) << 1)
356 #define STATUSF_IP10 (_ULCAST_(1) << 2)
358 #define STATUSF_IP11 (_ULCAST_(1) << 3)
360 #define STATUSF_IP12 (_ULCAST_(1) << 4)
362 #define STATUSF_IP13 (_ULCAST_(1) << 5)
364 #define STATUSF_IP14 (_ULCAST_(1) << 6)
366 #define STATUSF_IP15 (_ULCAST_(1) << 7)
386 #define CAUSEF_EXCCODE (_ULCAST_(31) << 2)
388 #define CAUSEF_IP (_ULCAST_(255) << 8)
390 #define CAUSEF_IP0 (_ULCAST_(1) << 8)
392 #define CAUSEF_IP1 (_ULCAST_(1) << 9)
394 #define CAUSEF_IP2 (_ULCAST_(1) << 10)
396 #define CAUSEF_IP3 (_ULCAST_(1) << 11)
398 #define CAUSEF_IP4 (_ULCAST_(1) << 12)
400 #define CAUSEF_IP5 (_ULCAST_(1) << 13)
402 #define CAUSEF_IP6 (_ULCAST_(1) << 14)
404 #define CAUSEF_IP7 (_ULCAST_(1) << 15)
406 #define CAUSEF_IV (_ULCAST_(1) << 23)
408 #define CAUSEF_CE (_ULCAST_(3) << 28)
410 #define CAUSEF_BD (_ULCAST_(1) << 31)
425 #define CONF_BE (_ULCAST_(1) << 15)
428 #define CONF_CU (_ULCAST_(1) << 3)
429 #define CONF_DB (_ULCAST_(1) << 4)
430 #define CONF_IB (_ULCAST_(1) << 5)
431 #define CONF_DC (_ULCAST_(7) << 6)
432 #define CONF_IC (_ULCAST_(7) << 9)
433 #define CONF_EB (_ULCAST_(1) << 13)
434 #define CONF_EM (_ULCAST_(1) << 14)
435 #define CONF_SM (_ULCAST_(1) << 16)
436 #define CONF_SC (_ULCAST_(1) << 17)
437 #define CONF_EW (_ULCAST_(3) << 18)
438 #define CONF_EP (_ULCAST_(15)<< 24)
439 #define CONF_EC (_ULCAST_(7) << 28)
440 #define CONF_CM (_ULCAST_(1) << 31)
443 #define R4K_CONF_SW (_ULCAST_(1) << 20)
444 #define R4K_CONF_SS (_ULCAST_(1) << 21)
445 #define R4K_CONF_SB (_ULCAST_(3) << 22)
448 #define R5K_CONF_SE (_ULCAST_(1) << 12)
449 #define R5K_CONF_SS (_ULCAST_(3) << 20)
452 #define RM7K_CONF_SE (_ULCAST_(1) << 3)
453 #define RM7K_CONF_TE (_ULCAST_(1) << 12)
454 #define RM7K_CONF_CLK (_ULCAST_(1) << 16)
455 #define RM7K_CONF_TC (_ULCAST_(1) << 17)
456 #define RM7K_CONF_SI (_ULCAST_(3) << 20)
457 #define RM7K_CONF_SC (_ULCAST_(1) << 31)
460 #define R10K_CONF_DN (_ULCAST_(3) << 3)
461 #define R10K_CONF_CT (_ULCAST_(1) << 5)
462 #define R10K_CONF_PE (_ULCAST_(1) << 6)
463 #define R10K_CONF_PM (_ULCAST_(3) << 7)
464 #define R10K_CONF_EC (_ULCAST_(15)<< 9)
465 #define R10K_CONF_SB (_ULCAST_(1) << 13)
466 #define R10K_CONF_SK (_ULCAST_(1) << 14)
467 #define R10K_CONF_SS (_ULCAST_(7) << 16)
468 #define R10K_CONF_SC (_ULCAST_(7) << 19)
469 #define R10K_CONF_DC (_ULCAST_(7) << 26)
470 #define R10K_CONF_IC (_ULCAST_(7) << 29)
473 #define VR41_CONF_CS (_ULCAST_(1) << 12)
474 #define VR41_CONF_P4K (_ULCAST_(1) << 13)
475 #define VR41_CONF_BP (_ULCAST_(1) << 16)
476 #define VR41_CONF_M16 (_ULCAST_(1) << 20)
477 #define VR41_CONF_AD (_ULCAST_(1) << 23)
480 #define R30XX_CONF_FDM (_ULCAST_(1) << 19)
481 #define R30XX_CONF_REV (_ULCAST_(1) << 22)
482 #define R30XX_CONF_AC (_ULCAST_(1) << 23)
483 #define R30XX_CONF_RF (_ULCAST_(1) << 24)
484 #define R30XX_CONF_HALT (_ULCAST_(1) << 25)
485 #define R30XX_CONF_FPINT (_ULCAST_(7) << 26)
486 #define R30XX_CONF_DBR (_ULCAST_(1) << 29)
487 #define R30XX_CONF_SB (_ULCAST_(1) << 30)
488 #define R30XX_CONF_LOCK (_ULCAST_(1) << 31)
491 #define TX49_CONF_DC (_ULCAST_(1) << 16)
492 #define TX49_CONF_IC (_ULCAST_(1) << 17) /* conflict with CONF_SC */
493 #define TX49_CONF_HALT (_ULCAST_(1) << 18)
494 #define TX49_CONF_CWFON (_ULCAST_(1) << 27)
497 #define MIPS_CONF_MT (_ULCAST_(7) << 7)
498 #define MIPS_CONF_AR (_ULCAST_(7) << 10)
499 #define MIPS_CONF_AT (_ULCAST_(3) << 13)
500 #define MIPS_CONF_M (_ULCAST_(1) << 31)
505 #define MIPS_CONF1_FP (_ULCAST_(1) << 0)
506 #define MIPS_CONF1_EP (_ULCAST_(1) << 1)
507 #define MIPS_CONF1_CA (_ULCAST_(1) << 2)
508 #define MIPS_CONF1_WR (_ULCAST_(1) << 3)
509 #define MIPS_CONF1_PC (_ULCAST_(1) << 4)
510 #define MIPS_CONF1_MD (_ULCAST_(1) << 5)
511 #define MIPS_CONF1_C2 (_ULCAST_(1) << 6)
512 #define MIPS_CONF1_DA (_ULCAST_(7) << 7)
513 #define MIPS_CONF1_DL (_ULCAST_(7) << 10)
514 #define MIPS_CONF1_DS (_ULCAST_(7) << 13)
515 #define MIPS_CONF1_IA (_ULCAST_(7) << 16)
516 #define MIPS_CONF1_IL (_ULCAST_(7) << 19)
517 #define MIPS_CONF1_IS (_ULCAST_(7) << 22)
518 #define MIPS_CONF1_TLBS (_ULCAST_(63)<< 25)
520 #define MIPS_CONF2_SA (_ULCAST_(15)<< 0)
521 #define MIPS_CONF2_SL (_ULCAST_(15)<< 4)
522 #define MIPS_CONF2_SS (_ULCAST_(15)<< 8)
523 #define MIPS_CONF2_SU (_ULCAST_(15)<< 12)
524 #define MIPS_CONF2_TA (_ULCAST_(15)<< 16)
525 #define MIPS_CONF2_TL (_ULCAST_(15)<< 20)
526 #define MIPS_CONF2_TS (_ULCAST_(15)<< 24)
527 #define MIPS_CONF2_TU (_ULCAST_(7) << 28)
529 #define MIPS_CONF3_TL (_ULCAST_(1) << 0)
530 #define MIPS_CONF3_SM (_ULCAST_(1) << 1)
531 #define MIPS_CONF3_MT (_ULCAST_(1) << 2)
532 #define MIPS_CONF3_SP (_ULCAST_(1) << 4)
533 #define MIPS_CONF3_VINT (_ULCAST_(1) << 5)
534 #define MIPS_CONF3_VEIC (_ULCAST_(1) << 6)
535 #define MIPS_CONF3_LPA (_ULCAST_(1) << 7)
536 #define MIPS_CONF3_DSP (_ULCAST_(1) << 10)
537 #define MIPS_CONF3_ULRI (_ULCAST_(1) << 13)
539 #define MIPS_CONF7_WII (_ULCAST_(1) << 31)
541 #define MIPS_CONF7_RPS (_ULCAST_(1) << 2)
547 #define MIPS_FPIR_S (_ULCAST_(1) << 16)
548 #define MIPS_FPIR_D (_ULCAST_(1) << 17)
549 #define MIPS_FPIR_PS (_ULCAST_(1) << 18)
550 #define MIPS_FPIR_3D (_ULCAST_(1) << 19)
551 #define MIPS_FPIR_W (_ULCAST_(1) << 20)
552 #define MIPS_FPIR_L (_ULCAST_(1) << 21)
553 #define MIPS_FPIR_F64 (_ULCAST_(1) << 22)
1331 if ((res & _ULCAST_(1)))
